General-Purpose Input/Output (Gpio) Port Timing - Texas Instruments TMS320C6712D User Manual

TMS320C6712D
FLOATING POINT DIGITAL SIGNAL PROCESSOR
SPRS293 − OCTOBER 2005

GENERAL-PURPOSE INPUT/OUTPUT (GPIO) PORT TIMING

timing requirements for GPIO inputs
NO. NO.
1 t w(GPIH) Pulse duration, GPIx high
2 t w(GPIL) Pulse duration, GPIx low
† P = 1/CPU clock frequency in ns. For example, when running parts at 150 MHz, use P = 6.7 ns.
‡ The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the DSP recognize the GPIx
changes through software polling of the GPIO register, the GPIx duration must be extended to at least 24P to allow the DSP enough time to access
the GPIO register through the CFGBUS.
switching characteristics over recommended operating conditions for GPIO outputs
(see Figure 48)
NO. NO.
3 t w(GPOH) Pulse duration, GPOx high
4 t w(GPOL) Pulse duration, GPOx low
† P = 1/CPU clock frequency in ns. For example, when running parts at 150 MHz, use P = 6.7 ns.
§ The number of CFGBUS cycles between two back-to-back CFGBUS writes to the GPIO register is 12 SYSCLK1 cycles; therefore, the minimum
GPOx pulse width is 12P.
GPIx
GPOx
96
†‡
(see Figure 48)
PARAMETER PARAMETER
2
1
3
Figure 48. GPIO Port Timing
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−150
MIN MAX
4P
4P
†§
−150
MIN MAX
12P − 3
12P − 3
4
UNIT UNIT
ns
ns
UNIT UNIT
ns
ns