External Interrupt Timing - Texas Instruments TMS320C6712D User Manual

timing requirements for external interrupts
NO. NO.
Width of the NMI interrupt pulse low
1 t w(ILOW)
1 t w(ILOW)
Width of the EXT_INT interrupt pulse low
Width of the NMI interrupt pulse high
2 2 t w(IHIGH) t w(IHIGH)
Width of the EXT_INT interrupt pulse high
† P = 1/CPU clock frequency in ns. For example, when running parts at 100 MHz, use P = 10 ns.
EXT_INT, NMI
FLOATING POINT DIGITAL SIGNAL PROCESSOR

EXTERNAL INTERRUPT TIMING

†
(see Figure 40)
1
Figure 40. External/NMI Interrupt Timing
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
TMS320C6712D
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
MIN
2P
4P
2P
4P
2
−150
UNIT UNIT
MAX
ns
ns
ns
ns
85