Parameter Measurement Information; Signal Transition Levels - Texas Instruments TMS320C6712D User Manual

42 Ω
4.0 pF
NOTE: The data sheet provides timing at the device pin. For output timing analysis, the tester pin electronics and its transmission line effects
must be taken into account. A transmission line with a delay of 2 ns or longer can be used to produce the desired transmission line effect.
The transmission line is intended as a load only. It is not necessary to add or subtract the transmission line delay (2 ns or longer) from
the data sheet timings.
Input requirements in this data sheet are tested with an input slew rate of < 4 Volts per nanosecond (4 V/ns) at the device pin.
Figure 15. Test Load Circuit for AC Timing Measurements

signal transition levels

All input and output timing parameters are referenced to 1.5 V for both "0" and "1" logic levels.
Figure 16. Input and Output Voltage Reference Levels for ac Timing Measurements
All rise and fall transition timing parameters are referenced to V
V MAX and V MIN for output clocks.
OL OH
Figure 17. Rise and Fall Transition Time Voltage Reference Levels
FLOATING POINT DIGITAL SIGNAL PROCESSOR

PARAMETER MEASUREMENT INFORMATION

Tester Pin Electronics
3.5 nH
Transmission Line
Z0 = 50 Ω
(see note)
1.85 pF
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POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
TMS320C6712D
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
Data Sheet Timing Reference Point
Output
Under
Test
Device Pin
(see note)
V ref = 1.5 V
MAX and V MIN for input clocks, and
IL IH
V ref = V IH MIN (or V OH MIN)
V ref = V IL MAX (or V OL MAX)
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