Texas Instruments TMS320C6712D User Manual page 68

TMS320C6712D
FLOATING POINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
switching characteristics over recommended operating conditions for CLKOUT3
(see Figure 23)
NO. NO.
1 t c(CKO3) Cycle time, CLKOUT3
2 t w(CKO3H) Pulse duration, CLKOUT3 high
3 t w(CKO3L) Pulse duration, CLKOUT3 low
4 t t(CKO3) Transition time, CLKOUT3
5 t d(CLKINH-CKO3V) Delay time, CLKIN high to CLKOUT3 valid
† The reference points for the rise and fall transitions are measured at V OL MAX and V OH MIN.
‡ C3 = CLKOUT3 period in ns. CLKOUT3 period is a divide-down of the CPU clock, configurable via the OSCDIV1 register. For more details, see
PLL and PLL controller.
CLKIN
CLKOUT3
NOTE A: For this example, the CLKOUT3 frequency is CLKIN divide-by-2.
timing requirements for ECLKIN
NO. NO.
1 t c(EKI) Cycle time, ECLKIN
2 t w(EKIH) Pulse duration, ECLKIN high
3 t w(EKIL) Pulse duration, ECLKIN low
4 t t(EKI) Transition time, ECLKIN
§ The reference points for the rise and fall transitions are measured at V IL MAX and V IH MIN.
ECLKIN
68
INPUT AND OUTPUT CLOCKS (CONTINUED)
PARAMETER PARAMETER
1
3
2
Figure 23. CLKOUT3 Timings
§
(see Figure 24)
Figure 24. ECLKIN Timings
•
POST OFFICE BOX 1443
5
4
4
1
4
2
3
HOUSTON, TEXAS 77251−1443
†‡
−150
UNIT UNIT
MIN MAX
C3 − 0.9 C3 + 0.9 ns
(C3/2) − 0.9 (C3/2) + 0.9 ns
(C3/2) − 0.9 (C3/2) + 0.9 ns
3 ns
1.5 7.5 ns
5
−150
UNIT UNIT
MIN MAX
10 ns
4.5 ns
4.5 ns
3 ns
4