Texas Instruments TMS320C6712D User Manual page 74

TMS320C6712D
FLOATING POINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
SYNCHRONOUS-BURST MEMORY TIMING (CONTINUED)
ECLKOUT
CE[3:0]
BE[1:0]
EA[21:2]
ED[15:0]
ARE/SDCAS/SSADS †
AOE/SDRAS/SSOE †
AWE/SDWE/SSWE †
† ARE/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM
accesses.
ECLKOUT
CE[3:0]
BE[1:0]
EA[21:2]
ED[15:0]
ARE/SDCAS/SSADS †
AOE/SDRAS/SSOE †
AWE/SDWE/SSWE †
† ARE/SDCAS/SSADS, AOE/SDRAS/SSOE, and AWE/SDWE/SSWE operate as SSADS, SSOE, and SSWE, respectively, during SBSRAM
accesses.
74
1
2
BE1 BE2 BE3
4
EA
6
8
8
9
Figure 28. SBSRAM Read Timing
1
2
BE1 BE2
4
EA
10
Q1 Q2
8 8
12
Figure 29. SBSRAM Write Timing
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3
BE4
5
7
Q1 Q2 Q3
1
3
BE3 BE4
5
11
Q3 Q4
12
1
Q4
9