TMS320C6712D
FLOATING POINT DIGITAL SIGNAL PROCESSOR
SPRS293A − OCTOBER 2005 − REVISED NOVEMBER 2005
ECLKOUT
CE[3:0]
BE[1:0]
EA[21:13]
EA[11:2]
EA12
ED[15:0]
AOE/SDRAS/SSOE †
ARE/SDCAS/SSADS †
AWE/SDWE/SSWE †
† ARE/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
76
SYNCHRONOUS DRAM TIMING (CONTINUED)
READ
1
1
2
BE1
BE2
4
5
Bank
4
5
Column
4
5
8
8
Figure 30. SDRAM Read Command (CAS Latency 3)
•
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HOUSTON, TEXAS 77251−1443
3
BE3
BE4
6
7
D1
D2
D3
D4
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