FusionServer Pro CH121 V5 Compute Node
Maintenance and Service Guide
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10.3.2 Memory Subsystem Architecture
The CH121 V5 provides 24 memory slots. Each processor integrates six memory channels.
Install the memory modules in the primary memory channels first. If the primary memory
channel is not populated, the memory modules in secondary memory channels cannot be used.
Table 10-2 Memory channels
CPU
CPU 1
Issue 06 (2019-08-10)
Description
Capacity of the memory module.
Number of ranks of the memory
module.
Data width on the DRAM.
Type of the memory interface.
Maximum memory speed.
Column Access Strobe (CAS)
latency.
DIMM type.
Memory Channel
1A (primary)
1A
1B (primary)
1B
Copyright © Huawei Technologies Co., Ltd.
10 Hardware Description
Definition
l 8 GB
l 16 GB
l 32 GB
l 64 GB
l 128 GB
l 1R: single-rank
l 2R: dual-rank
l 4R: quad-rank
l 8R: octal-rank
l X4: 4-bit
l X8: 8-bit
l PC3: DDR3
l PC4: DDR4
l 2133 MT/S
l 2400 MT/S
l 2666 MT/S
l 2933 MT/S
l P: 15
l T: 17
l R: RDIMM
l L: LRDIMM
Memory Slot
DIMM000(1A1)
DIMM001(1A2)
DIMM010(1B1)
DIMM011(1B2)
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