Closing The Ibert Demonstration; Superclock-2 Frequency Table - Xilinx Virtex-7 FPGA VC7222 IBERT Getting Started Manual

Closing the IBERT Demonstration

To stop the IBERT demonstration:
1.
2.

SuperClock-2 Frequency Table

Table 1-2
read-only memory (ROM).
Table 1-2: Si570 and Si5368 Frequency Table
Address Protocol
0 100GE/40GE/10GE
1 Aurora
2 Aurora
3 Aurora
4 Aurora
5 CE111
6 CPRI
7 CPRI
8 CPRI
9 CPRI
10 CPRI
11 Display Port
12 Display Port
13 Display Port
14 Display Port
15 Fibrechannel
16 Fibrechannel
17 Fibrechannel
18 GigE
19 GigE
20 GigE
21 GigE
22 GPON
23 Interlaken
24 Interlaken
VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
Close the Vivado Design Suite by selecting File > Exit.
Place the main power switch SW1 in the OFF position.
lists the addresses for the frequencies that are programmed into the SuperClock-2
Frequency
Address
(MHz)
161.30 30
81.25 31
162.5 32
325 33
650 34
173.37 35
61.44 36
122.88 37
153.63 38
245.76 39
491.52 40
67.5 41
81 42
135 43
162 44
106.25 45
212.5 46
425 47
62.5 48
125 49
250 50
500 51
187.5 52
132.813 53
195.313 54
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SuperClock-2 Frequency Table
Frequency
Protocol Address Protocol
(MHz)
OBSAI 307.2
OBSAI 614.4
OC-48 19.44
OC-48 77.76
OC-48 155.52
OC-48 311.04
OC-48 622.08
OTU-1 166.629
OTU-1 333.257
OTU-1 666.514
OTU-1 666.75
OTU-2 167.33
OTU-2 669.31
OTU-3 168.05
OTU-4 174.69
PCIe 100
PCIe 125
PCIe 250
SATA 75
SATA 150
SATA 300
SATA 600
SDI 74.25
SDI 148.5
SDI 297
Frequency
(MHz)
60 XAUI 156.25
61 XAUI 312.5
62 XAUI 625
63 Generic 66.667
64 Generic 133.333
65 Generic 166.667
66 Generic 266.667
67 Generic 333.333
68 Generic 533.333
69 Generic 644
70 Generic 666.667
71 Generic 205
72 Generic 210
73 Generic 215
74 Generic 220
75 Generic 225
76 Generic 230
77 Generic 235
78 Generic 240
79 Generic 245
80 Generic 250
81 Generic 255
82 Generic 260
83 Generic 265
84 Generic 270
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