Xilinx Virtex-7 FPGA VC7222 IBERT Getting Started Manual page 64

Vivado design suite 2014.2. characterization kit ibert
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Chapter 3: Creating the GTZ IBERT Core
11. In the Program Manager window, under Program and Debug, click Generate
X-Ref Target - Figure 3-12
12. When the Bitstream Generation Completed dialog window appears, click Cancel
X-Ref Target - Figure 3-13
13. Navigate to
64
Send Feedback
Bitstream. Confirm the launching of implementation
Figure 3-12: Generate Bitstream
(Figure 3-12).
Figure 3-13: Bitstream Generation Completed
..\ibert_7series_gtz_0\ibert_7series_gtz_0_example\ibert_7serie
s_gtz_0_example.runs\impl_1 directory to locate the generated bitstream.
www.xilinx.com
(Figure
3-12).
VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014

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