Xilinx Virtex-7 FPGA VC7222 IBERT Getting Started Manual page 14

Chapter 1: VC7222 IBERT Getting Started Guide
3.
4.
X-Ref Target - Figure 1-9
There is one IBERT demonstration design for each GTH Quad on the VC7222 board, for a
total of six IBERT designs. Additional designs are provided to demonstrate the GTZ and
the USB/UART interface (details of this demonstration are described in the README file
on the SD card). All eight designs are organized and stored on the SD card as shown in
Table
Table 1-1: SD Card Contents and Configuration Addresses
5.
14
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Connect the host computer to the VC7222 board using a standard-A plug to Micro-B
plug USB cable. The standard-A plug connects to a USB port on the host computer and
the Micro-B plug connects to U57, the Digilent USB JTAG configuration port on the
VC7222 board.
Select the GTH IBERT demonstration with the System ACE™ tool SD controller
SYSACE-2 CFG switch, SW8. The setting on this 4-bit DIP switch
the file used to configure the FPGA. A switch is in the ON position if set to the far right
and in the OFF position if set to the far left. For the Quad 115 GTH IBERT
demonstration, set ADR2 = ON, ADR1 = OFF, and ADR0 = ON. The MODE bit (switch
position 4) is not used and can be set either ON or OFF.
Figure 1-9: Configuration Address DIP Switch (SW8)
1-1.
Demonstration Design
GTH Quad 113
GTH Quad 114
GTH Quad 115
GTH Quad 213
GTH Quad 214
GTH Quad 215
GTZ Quad 300A and 300B
USB/UART
Place the main power switch SW1 to the ON position.
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ADR2 ADR1
ON ON
ON ON
ON OFF
ON OFF
OFF ON
OFF ON
OFF OFF
OFF OFF
VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
(Figure 1-9) selects
ADR0
ON
OFF
ON
OFF
ON
OFF
ON
OFF