Xilinx Virtex-7 FPGA VC7222 IBERT Getting Started Manual page 43

Vivado design suite 2014.2. characterization kit ibert
Hide thumbs Also See for Virtex-7 FPGA VC7222 IBERT:
Table of Contents

Advertisement

5.
Note:
X-Ref Target - Figure 2-3
VC7222 IBERT Getting Started Guide
UG971 (v5.0) June 12, 2014
In the Manage IP Settings window, select Verilog for Target language, Vivado
Simulator for Target simulator, Mixed for Simulator language, and a directory to
save the customized IP
(Figure
Make sure the directory name does not include spaces.
Figure 2-3: Manage IP Settings
www.xilinx.com
2-3). Click Finish.
43
Send Feedback

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents