Chapter 1: SP601 Evaluation Board
12. FPGA INIT and DONE LEDs
The typical Xilinx FPGA power up and configuration status LEDs are present on the
SP601. The INIT LED DS10 comes on after the FPGA powers up and completes its internal
power-on process. The DONE LED DS9 comes on after the FPGA programming bitstream
has been downloaded and the FPGA successfully configured.
X-Ref Target - Figure 1-21
INIT_B = 0, LED: ON
INIT_B = 1, LED: OFF
FPGA INIT B
Table 1-16: FPGA INIT and DONE LED Connections
X-Ref Target - Figure 1-22
34
VCC2V5
VCC2V5
1
R23
1
4.7K
R90
5%
27.4
2
1/16W
1%
2
1/16W
Figure 1-21: FPGA INIT and DONE LEDs
FPGA U1 Pin
Schematic Netname Controlled LED
U3
FPGA_INIT_B
V17
FPGA_DONE
NET "FPGA_INIT_B"
NET "FPGA_DONE"
Figure 1-22: UCF Location Constraints for FPGA INIT and DONE
www.xilinx.com
VCC2V5
FPGA DONE
DS10 INIT
DS9 DONE
LOC = "U3";
LOC = "V17";
SP601 Hardware User Guide
UG518 (v1.1) August 19, 2009
1
R113
332
1%
2
1/16W
1
R89
27.4
1%
2
1/16W
UG518_21_070809
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