Display Functions - Hitachi HD64411 Q2 User Manual

Quick 2d graphics renderer
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Main memory
(a) ISAR: Image data transfer start
∆YUV or
YUV data
(b) IDSRX, Y: Image data size
(c) IEMR: Input ata conversion mode
(d) IDER: Image data entry
(a) ISAR: Image data transfer start address
(b) IDSRX, Y: Image data size
(c) IEMR (bits YUV1, 0): Input data conversion mode
Write to IDER: Image data entry
• RGB-to-YC conversion
The Q2 can convert RGB data in the frame buffers to YC data before outputting it. The display
mode register (DSMR) contains a conversion enable bit (the YCM bit). If this bit is modified
during display, several pixels of abnormal data will be output. This bit should therefore only be
modified outside the display period.
3 . 3 . 4

Display Functions

The Q2 has functions for outputting image data, drawn in the UGM, in synchronization with
externally or internally generated display timing.
Register and Display Screen: In the Q2, horizontal and vertical display timing for the
display screen is set in the display parameter register (see section 5.5, Display Control Registers).
46
Q2 internal registers
address
Figure 3-12
Figure 3-13
Memory width (512 or 1024 dots)
is specified by the MWX bit in
the rendering mode register
UGM source area
Start address
(ISAR)
X size (IDSRX)
Y size
(IDSRY)
RGB data

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