Hitachi HD64411 Q2 User Manual page 139

Bit 13—DMA Flag (DMF): Flag that indicates that DMA transfer mode has been initiated
and transfer has been completed.
Bit 13:
DMF Description
0 DMA transfer mode has not been initiated at all since DMF flag clearing by the DMCL
bit in SRCR, or the next DMA transfer mode (bits DMA1 and DMA0 = 01 or 11 in SYSR)
has been initiated and the remaining transfer count has not yet reached 0.
1 DMA transfer mode has been initiated and the transfer word count has reached 0.
The DMF flag retains its state until cleared by a reset or by software.
Bit 12—Command Error Flag (CER): Flag that indicates that an illegal command has
been fetched.
Bit 12:
C E R Description
0 Normal state. An illegal command has not been fetched since CER flag clearing by the
SRES bit in SYSR or the CECL bit in SRCR.
1 Drawing operation halt state. Drawing operation remains halted because an illegal
command was fetched after CER flag clearing by the SRES bit in SYSR or the CECL
bit in SRCR.
The CER flag retains its state until cleared by a reset or by software.
Bit 11—Vertical Blanking Flag (VBK): Flag that indicates the vertical blanking interval.
Bit 11:
V B K Description
0 Indicates the interval from VBK flag clearing by the DRES bit in SYSR or the VBCL bit
in SRCR until the end of the next display.
1 Indicates the interval from the first vertical blanking interval after VBK flag clearing by
the DRES bit in SYSR or the VBCL bit in SRCR until the VBK flag is cleared again (field
units).
132
(Initial value)
(Initial value)
(Initial value)