Hitachi HD64411 Q2 User Manual page 21

Quick 2d graphics renderer
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Table 2-1 Pin Functions (cont)
T y p e
Symbol
Pin
CPU
A20
60
interface A21
61
A22
62
D0
2
D1
3
D2
5
D3
7
D4
8
D5
9
D6
10
D7
11
D8
13
D9
14
D10
15
D11
17
D12
18
D13
20
D14
21
D15
22
CS0
26
CS1
27
RD
28
WE0
29
WE1
30
DACK
31
DREQ
1
WAIT
144
IRL
143
14
No. I / O
Function
Input
CPU address 20
Input
CPU address 21
Input
CPU address 22
Input/output CPU data 0
Input/output CPU data 1
Input/output CPU data 2
Input/output CPU data 3
Input/output CPU data 4
Input/output CPU data 5
Input/output CPU data 6
Input/output CPU data 7
Input/output CPU data 8
Input/output CPU data 9
Input/output CPU data 10
Input/output CPU data 11
Input/output CPU data 12
Input/output CPU data 13
Input/output CPU data 14
Input/output CPU data 15
Input
Chip select 0 (UGM)
Input
Chip select 1 (internal
registers)
Input
Read strobe
Input
Write pulse 0
Input
Write pulse 1
Input
DMA acknowledge
Output
DMA request
Output
CPU wait
Output
Interrupt request
N o t e s
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F
3V/5V-CPU I/F

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