Hitachi HD64411 Q2 User Manual page 16

Quick 2d graphics renderer
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Table 1-1 Summary of Q2 Functions (cont)
I t e m
Interface
SH
Unified
graphics
memory
Display
Process/package
Power supply voltage/temperature range
Function/Performance
Command/data
Performed by DMA transfer (single address) or by
transfer
SuperH
YUV → RGB
16-bit input, 4:2:2 (8 bits each for Y, U, V)
conversion
16-bit output (R: 5, G: 6, B: 5 bits)
∆YUV → RGB
8-bit input (4 bits each for d-Y, d-U, d-V)
conversion
16-bit output (R: 5, G: 6, B: 5 bits)
Interrupt output Sync detection, frame detection, DMA transfer
end, command error, vertical blanking, command
end, command abort
Supported
Directly connectable to 3.3 V or 5 V operation
SuperH
SuperH
Minimum 4 Mbits (choice of 4 Mbits × 1,
16-bit-bus-width
4 Mbits × 2, 16 Mbits × 1, 16 Mbits × 2)
EDO-DRAM
RGB → YCrCb
16-bit input (R: 5, G: 6, B: 5)
conversion
16-bit output, 4:2:2 (8 bits each for Y, Cr, Cb)
0.6-micron CMOS/144-pin QFP
5.0 V ±5%/0°C to 70°C (I-specification:
5.0 V ±10%/–40°C to 85°C)
9

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