Hitachi HD64411 Q2 User Manual page 193

(10) Master Display Mode
Table 7-13Master Display Mode
I t e m
DCLK Rise Delay Time from
CLK1
FCLK Rise Delay Time from
CLK1
FCLK Fall Delay Time from
CLK1
DD Setup Time For DCLK
DD Hold Time For DCLK
HSYNC Delay Time From
DCLK
VSYNC Delay Time From
DCLK
ODDF Delay Time From
DCLK
CSYNC Delay Time From
DCLK
DISP Delay Time From
DCLK
CDE Delay Time From DCLK t
186
Symbol Min M a x
t — 30
DCRD
t — 30
FCRD
t — 30
FCFD
t 9 —
DDS
t 5 —
DDH
t — 25
HSDD
t — 25
VSDD
t — 25
ODDD
t — 25
SYDD
t — 25
DIDD
— 25
CDEDD
T e s t
Unit Conditions N o t e s
ns Figure 7-16
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns