Switch Onto Fault Logic - ABB REB670 Applications Manual

1MRK 505 337-UUS -
7.3.2.5
Application manual
the inrush currents of the two transformers will be in phase opposition. The summation of
the two currents will thus give a small 2
current will however be significant. The inrush current of the transformer in service before
the parallel transformer energizing, will be a little delayed compared to the first
transformer. Therefore we will have high 2
period this current will however be small and the normal 2
51N
Power System
ANSI05000136 V1 EN
Figure 87: Application for parallel transformer inrush current logic
If the BlkParTransf function is activated the 2
as the residual current measured by the relay is larger than a selected step current level.
Assume that step 4 is chosen to be the most sensitive step of the four step residual
overcurrent protection function EF4PTOC (51N_67N). The harmonic restrain blocking is
enabled for this step. Also the same current setting as this step is chosen for the blocking
at parallel transformer energizing.
Below the settings for the parallel transformer logic are described.
Use_PUValue: Gives which current level that should be used for activation of the
blocking signal. This is given as one of the settings of the steps: Step 1/2/3/4. Normally the
step having the lowest operation current level should be set.
BlkParTransf: This parameter can be set Disable/Enable, the parallel transformer logic.

Switch onto fault logic

In case of energizing a faulty object there is a risk of having a long fault clearance time,
if the fault current is too small to give fast operation of the protection. The switch on to
fault function can be activated from auxiliary signals from the circuit breaker, either the
close command or the open/close position (change of position).
This logic can be used to issue fast trip if one breaker pole does not close properly at a
manual or automatic closing.
nd
harmonic current. The residual fundamental
nd
harmonic current initially. After a short
51N
en05000136_ansi.vsd
nd
harmonic restrain signal will latch as long
Section 7
Current protection
nd
harmonic blocking will reset.
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