Operation - Hitachi H8/3637 Hardware Manual

13.3

Operation

When using the 14-bit PWM, register settings should be carried out in the following order:
1. Set PWM in PMR1 to 1 to designate the P1
2. Use PWCR0 in PWCR to select either 32,768/ø (PWCR0 = 1) or 16,384/ø (PWCR0 = 0) as the
conversion period.
3. Set the output waveform data in PWDRU and PWDRL. Data must be written to PWDRL first,
then to PWDRU. When PWDRU is written to, the data is simultaneously latched in the PWM
waveform generator, and PWM waveform generation updating is performed in synchronization
with an internal signal.
As shown in figure 13.2, one conversion period consists of 64 pulses; the total high-level width
(T ) during this conversion period corresponds to the data in PWDRU and PWDRL.
H
= (PWDRU/PWDRL data value + 64) × tø/2
T
H
Here, tø is the PWM input clock cycle: either 2/ø (when PWCR0 = 0) or 4/ø (when PWCR0 = 1).
Example: To set a conversion period of 8,192 µs, the following settings are made.
When PWCR0 is cleared to 0, one conversion period is 16,384/ø, and therefore ø = 2
MHz. In this case, t
When PWCR0 is set to 1, one conversion period is 32,768/ø, and therefore ø = 4 MHz.
In this case, t
Therefore, to set a conversion period of 8,192 µs, a system clock (ø) of 2 MHz or 4
MHz should be used.
t
f1
t
H1
T = t + t
H H1 H2
t = t = t
f1 f2 f3
296
= 128 µs, and 1/ø (precision) = 0.5 µs.
fn
= 128 µs, and 2/ø (precision) = 0.5 µs.
fn
Conversion period
t
f2
t
H2
+ t + ..... t
H3 H64
..... = t
f64
Figure 13.2 PWM Output Waveform
/PWM pin as the PWM output pin.
4
t t
H3 H63
t t
f63 f64
t
H64