Hitachi H8/3637 Hardware Manual page 354

TCSRW—Timer control/status register W
Bit
B6WI
Initial value
Read/Write
Bit 6 write disable
Note: * Writing possible only when write condition is satisfied
7 6 5
TCWE B4WI
1 0 1
R R/(W)*
R
Bit 4 write disable
Timer counter W write enable
0 Data writing to TCW disabled
1 Data writing to TCW enabled 1
0 Writing to bit 6 enabled
1 1 Writing to bit 6 disabled
4 3
TCSRWE B2WI
0 1
R/(W)* R
Bit 0 write disable
0 Writing to bit 0 enabled
1 Writing to bit 0 disabled 1
Watchdog timer on
0 Watchdog timer operation disabled
1 Watchdog timer operation enabled 1
Bit 2 write disable
0 Writing to bit 2 enabled
1 Writing to bit 2 disabled 1
Timer control/status register W write enable
0 Writing to bit 2 and bit 0 disabled
1 1 Writing to bit 2 and bit 0 enabled
0 Writing to bit 4 enabled
1 Writing to bit 4 disabled 1
H'B4 Watchdog timer
2 1
WDON B0WI
0 1
R/(W)* R
Watchdog timer reset
0 [Clearing conditions]
• Reset by RES pin
• When 0 is written to WRST
while writing 0 to B0WI
when TCSRWE is set to 1
1 [Setting condition] 1
When TCW overflows and
an internal reset signal is
generated
0
WRST
0
R/(W)*
353