Hitachi H8/3637 Hardware Manual page 61

H8/3637 series
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Example 2: Here a BSET instruction is executed designating port 6.
P6
and P6
are designated as input pins, with a low-level signal input at P6
7
6
signal at P6
. The remaining pins, P6
6
example, the BSET instruction is used to change pin P6
[A: Prior to executing BSET]
P6
7
Input/output
Input
Pin state
Low
level
PCR6
0
PDR6
1
[B: BSET instruction executed]
BSET
#0,
@PDR6
[C: After executing BSET]
P6
7
Input/output
Input
Pin state
Low
level
PCR6
0
PDR6
0
[D: Explanation of how BSET operates]
When the BSET instruction is executed, first the CPU reads port 6.
Since P6
and P6
are input pins, the CPU reads the pin states (low-level and high-level input).
7
6
P6
to P6
are output pins, so the CPU reads the value in PDR6. In this example PDR6 has a value
5
0
of H'80, but the value read by the CPU is H'40.
Next, the CPU sets bit 0 of the read data to 1, changing the PDR6 data to H'41. Finally, the CPU
writes this value (H'41) to PDR6, completing execution of BSET.
As a result of this operation, bit 0 in PDR6 becomes 1, and P6
However, bits 7 and 6 of PDR6 end up with different values.
to P6
, are output pins and output low-level signals. In this
5
0
P6
P6
6
5
Input
Output
High
Low
level
level
0
1
0
0
The BSET instruction is executed designating port 6.
P6
P6
6
5
Input
Output
High
Low
level
level
0
1
1
0
to high-level output.
0
P6
P6
P6
4
3
Output
Output
Low
Low
level
level
1
1
0
0
P6
P6
P6
4
3
Output
Output
Low
Low
level
level
1
1
0
0
0
outputs a high-level signal.
0
and a high-level
7
P6
P6
2
1
Output
Output
Output
Low
Low
Low
level
level
level
1
1
1
0
0
0
P6
P6
2
1
Output
Output
Output
Low
Low
High
level
level
level
1
1
1
0
1
0
0
51

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