Prescalers; Note On Oscillators - Hitachi H8/3637 Hardware Manual

4.4

Prescalers

The H8/3637 Series is equipped with two on-chip prescalers having different input clocks
(prescaler S and prescaler W). Prescaler S is a 13-bit counter using the system clock (ø) as its
input clock. Its prescaled outputs provide internal clock signals for on-chip peripheral modules.
Prescaler W is a 5-bit counter using a 32.768-kHz signal divided by 4 (ø
prescaled outputs are used by timer A as a time base for timekeeping.
Prescaler S (PSS): Prescaler S is a 13-bit counter using the system clock (ø) as its input clock. It
is incremented once per clock period.
Prescaler S is initialized to H'0000 by a reset, and starts counting on exit from the reset state.
In standby mode, watch mode, subactive mode, and subsleep mode, the system clock pulse
generator stops. Prescaler S also stops and is initialized to H'0000.
The CPU cannot read or write prescaler S.
The output from prescaler S is shared by the on-chip peripheral modules. The divider ratio can be
set separately for each on-chip peripheral function.
In active (medium-speed) mode the clock input to prescaler S is ø
Prescaler W (PSW): Prescaler W is a 5-bit counter using a 32.768 kHz signal divided by 4 (ø
as its input clock.
Prescaler W is initialized to H'00 by a reset, and starts counting on exit from the reset state.
Even in standby mode, watch mode, subactive mode, or subsleep mode, prescaler W continues
functioning so long as clock signals are supplied to pins X
Prescaler W can be reset by setting 1s in bits TMA3 and TMA2 of timer mode register A (TMA).
Output from prescaler W can be used to drive timer A, in which case timer A functions as a time
base for timekeeping.
4.5

Note on Oscillators

Oscillator characteristics of both the masked ROM and ZTAT
board design and should be carefully evaluated by the user, referring to the examples shown in this
section and figure 4.10, Example of Crystal and Ceramic Oscillator Layout. Oscillator circuit
constants will differ depending on the oscillator element, stray capacitance in its interconnecting
circuit, and other factors. Suitable constants should be determined in consultation with the
oscillator element manufacturer. Design the circuit so that the oscillator element never receives
voltages exceeding its maximum rating.
84
/4) as its input clock. Its
W
/16.
OSC
and X .
1 2
TM
versions are closely related to
/4)
W