Notes On Bit Manipulation - Hitachi H8/3637 Hardware Manual

2.9.2

Notes on Bit Manipulation

The BSET, BCLR, BNOT, BST, and BIST instructions read one byte of data, modify the data,
then write the data byte again. Special care is required when using these instructions in cases
where two registers are assigned to the same address, in the case of registers that include write-
only bits, and when the instruction accesses an I/O.
Order of Operation
1 Read
2 Modify
3 Write
Bit Manipulation in Two Registers Assigned to the Same Address
Example 1: Bit manipulation to the timer load register and the timer counter
Figure 2.18 shows an example in which two timer registers share the same address. When a bit
manipulation instruction accesses the timer load register and timer counter of a reloadable timer,
since these two registers share the same address, the following operations take place.
Order of Operation
1 Read
2 Modify
3 Write
The timer counter is counting, so the value read is not necessarily the same as the value in the
timer load register. As a result, bits other than the intended bit in the timer load register may be
modified to the timer counter value.
Count clock
50
Operation
Read byte data at the designated address
Modify a designated bit in the read data
Write the altered byte data to the designated address
Operation
Timer counter data is read (one byte)
The CPU modifies (sets or resets) the bit designated in the instruction
The altered byte data is written to the timer load register
Timer counter
Reload
Timer load register
Figure 2.18 Timer Configuration Example
R
R: Read
W: Write
W
Internal bus