14.2.3
AC Characteristics
Table 14.3 lists the control signal timing, and tables 14.4 and 14.5 list the serial interface timing.
Table 14.3 Control Signal Timing
V
= 2.7 V to 5.5 V, AV
CC
subactive mode, unless otherwise specified.
Item
Symbol
System clock
f
oscillation frequency
OSC clock (ø
)
t
OSC
cycle time
System clock (ø)
t
cycle time
Subclock oscillation
f
frequency
Watch clock cycle
t
time (ø
)
W
Subclock (ø
)
t
SUB
cycle time
Instruction cycle time
Oscillation stabiliza-
t
tion time
(crystal oscillator)
Oscillation
t
stabilization time
External clock high
t
width
External clock low
t
width
External clock rise
t
time
External clock fall
t
time
Pin RES low width
t
Notes: 1. A frequency between 1 MHz to 10 MHz is required when an external clock is input.
2. Selected with SA1 and SA0 of system clock control register 2 (SYSCR2).
= 2.7 V to 5.5 V, V
CC
Applicable
Pins
OSC
, OSC
OSC
1
2
OSC
, OSC
OSC
1
2
cyc
X
, X
W
1
2
X
, X
W
1
2
subcyc
OSC
, OSC
rc
1
2
X
, X
rc
1
2
OSC
CPH
1
OSC
CPL
1
CPr
CPf
RES
REL
= AV
= 0.0 V, T
SS
SS
Min Typ
Max
Unit
2
—
10
MHz
100
—
1000 ns
2
—
16
t
OSC
—
—
2000 ns
—
32.768 —
kHz
µs
—
30.5
—
2
—
8
t
W
2
—
—
t
cyc
t
subcyc
—
—
40
ms
—
—
60
—
—
2
s
40
—
—
ns
80
—
—
40
—
—
ns
80
—
—
—
—
15
ns
—
—
20
—
—
15
ns
—
—
20
18
—
—
t
cyc
t
subcyc
= –20 to +75°C, including
a
Reference
Test Condition
Figure
1
Figure 14.1
1
2
V
= 4.0 V to 5.5 V
CC
V
= 4.0 V to 5.5 V Figure 14.1
CC
V
= 4.0 V to 5.5 V Figure 14.1
CC
V
= 4.0 V to 5.5 V Figure 14.1
CC
V
= 4.0 V to 5.5 V Figure 14.1
CC
Figure 14.2
305