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Block Diagram: Figure 9.6 shows a block diagram of timer G.
ø
ø /2
W
Noise
canceller
TMIG
circuit
NCS
Legend:
TMG:
Timer mode register G
TCG:
Timer counter G
ICRGF:
Input capture register GF
ICRGR:
Input capture register GR
IRRTG:
Timer G interrupt request flag
NCS:
Noise canceller select
PSS:
Prescaler S
Pin Configuration: Table 9.8 shows the timer G pin configuration.
Table 9.8
Pin Configuration
Name
Input capture input
182
PSS
Edge
sense
circuit
Figure 9.6 Block Diagram of Timer G
Abbrev.
TMIG
TMG
ICRGF
TCG
ICRGR
I/O
Function
Input
Input capture
Level
sense
circuit
IRRTG
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