Hitachi H8/3637 Hardware Manual page 398

Appendix D Port States in the Different Processing States
Table D.1 Port States Overview
Port Reset
P1 to P1 High
7 0
impedance
P2 to P2 High
6 0
impedance
P5 to P5 High
7 0
impedance
P6 to P6 High
7 0
impedance
P7 to P7 High
7 0
impedance
P8 to P8 High
7 0
impedance
P9 to P9 High
7 0
impedance
PA to PA High
3 0
impedance
P2 , High
7
PB to PB impedance
7 4
PE to PE High
3 2
impedance
Note: * High level output when MOS pull-up is in on state.
Sleep Subsleep Standby
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
High High
impedance impedance
Retained Retained
Watch
High Retained
impedance*
High Retained
impedance*
High Retained
impedance*
High Retained
impedance*
High Retained
impedance
High Retained
impedance
High Retained
impedance
High Retained
impedance
High High
impedance impedance
High Retained
impedance
Subactive Active
Functional Functional
Functional Functional
Functional Functional
Functional Functional
Functional Functional
Functional Functional
Functional Functional
Functional Functional
High High
impedance impedance
Functional Functional
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