V
CC
V
CC
P1
5
V
SS
PDR1:
Port data register 1
PCR1:
Port control register 1
PMR1:
Port mode register 1
PUCR1:
Port pull-up control register 1
Figure C.1 (c) Port 1 Block Diagram (Pin P1
SBY (low level during reset
and in standby mode)
Internal
data bus
PUCR1
5
PMR1
5
PDR1
5
PCR1
5
)
5
IRQ
1
377