Register Descriptions; A/D Result Register (Adrr); A/D Mode Register (Amr) - Hitachi H8/3637 Hardware Manual

12.2

Register Descriptions

12.2.1

A/D Result Register (ADRR)

Bit
ADR7
Initial value
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
Read/Write
The A/D result register (ADRR) is an 8-bit read-only register for holding the results of analog-to-
digital conversion.
ADRR can be read by the CPU at any time, but the ADRR values during A/D conversion are
undefined.
After A/D conversion is complete, the conversion result is stored in ADRR as 8-bit data; this data
is held in ADRR until the next conversion operation starts.
ADRR is not cleared on reset.
12.2.2

A/D Mode Register (AMR)

Bit
CKS
Initial value
Read/Write R/W
AMR is an 8-bit read/write register for specifying the A/D conversion speed, external trigger
option, and the analog input pins.
Upon reset, AMR is initialized to H'10.
284
7 6
ADR6 ADR5
R R
7 6
TRGE CKS1
0 0
R/W R/W
5 4
ADR4 ADR3
R R R
5 4
— CH3
0 1
— R/W
3 2
ADR2 ADR1
R R
3 2
CH2 CH1
0 0
R/W R/W
1 0
ADR0
R
1 0
CH0
0 0
R/W