SCSR1—Serial control/status register 1
Bit
—
Initial value
Read/Write
—
Note:
*
Only a write of 0 for flag clearing is possible.
SDRU—Serial data register U
Bit
SDRU7
Initial value
Undefined
Read/Write
R/W
342
7
6
5
SOL
ORER
1
0
0
R/W
R/(W)
Overrun error flag
0 [Clearing condition]
1 [Setting condition]
Extended data bit
0 Read
SO
Write
SO
1 Read
SO
Write
SO
7
6
SDRU6
SDRU5
Undefined
Undefined
R/W
R/W
Stores transmit and receive data
8-bit transfer mode:
16-bit transfer mode:
4
3
—
—
1
1
*
—
—
Start flag
0
Read
Indicates that transfer is stopped
Write
Invalid
1
Read
Indicates transfer in progress
Write
Starts a transfer operation
After reading 1, cleared by writing 0
Set if a clock pulse is input after transfer
is complete, when an external clock is used
pin output level is low
1
pin output level changes to low
1
pin output level is high
1
pin output level changes to high
1
5
4
3
SDRU4
SDRU3
Undefined
Undefined
R/W
R/W
H'A1
2
1
—
—
1
0
—
R
H'A2
2
1
SDRU2
SDRU1
Undefined
Undefined
R/W
R/W
Not used
Upper 8 bits of data
SCI1
0
STF
0
R/W
SCI1
0
SDRU0
Undefined
R/W