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Bit 0—Clock Select 0 (PWCR0): Bit 0 selects the clock supplied to the 14-bit PWM. It is a
write-only bit, and is always read as 1.
Bit 0: PWCR0
0
1
Note: * tø: PWM input clock cycle
13.2.2
PWM Data Registers U and L (PWDRU, PWDRL)
Bit
PWDRU
Initial value
Read/Write
Bit
PWDRL
PWDRL7 PWDRL6 PWDRL5 PWDRL4 PWDRL3 PWDRL2 PWDRL1 PWDRL0
Initial value
Read/Write
PWDRU and PWDRL together comprise a 14-bit write-only register, with PWDRU as the upper 6
bits and PWDRL as the lower 8 bits. The value written to PWDRU and PWDRL corresponds to
the total high-level width of one PWM waveform cycle.
When 14-bit data is written to PWDRU and PWDRL, the contents of these registers are latched in
the PWM waveform generator, and the PWM waveform generation data is updated. The 14-bit
data must be set in the following order:
1. Write lower 8-bit data to PWDRL.
2. Write upper 6-bit data to PWDRU.
PWDRU and PWDRL are write-only registers, and all bits are always read as 1.
Upon reset, PWDRU and PWDRL together are initialized to H'C000.
Description
Input clock ø/2 (tø* = 2/ø)
PWM waveform generated with conversion cycle of 16,384/ø and minimum
transition width of 1/ø
Input clock ø/4 (tø* = 4/ø)
PWM waveform generated with conversion cycle of 32,768/ø and minimum
transition width of 2/ø
7
6
—
—
PWDRU5 PWDRU4 PWDRU3 PWDRU2 PWDRU1 PWDRU0
1
1
—
—
W
7
6
0
0
W
W
W
5
4
0
0
W
W
5
4
0
0
W
W
3
2
0
0
W
W
3
2
0
0
W
W
(initial value)
1
0
0
0
W
1
0
0
0
W
295
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