Sdram Write Single 16-Bit Half-Word With Burst Stop - Texas Instruments OMAP5910 Reference Manual

Memory Interfaces
Figure 9.

SDRAM Write Single 16-Bit Half-Word With Burst Stop

ACCESS_REG
ACCESS_GRANT
COMMAND
ADDRESS
DQ
CURRENT_COL
CURRENT_SIZE
DVALID
SAVE_ADD
LAST_DATE
WRITE (burst reduced to 1) is interrupted by a STOP command because no new request is pending.
Note:
40 Memory Interface Traffic Controller
ACTV0 WRITE STOP
NA A
2
B0/R0 B0/C0
D
C0+1
C0
0
NA
Ignored
SPRU673