Sdram Read Burst 4 Half-Words Followed By A Write Burst 3 Half-Words - Texas Instruments OMAP5910 Reference Manual

Memory Interfaces
Figure 15.

SDRAM Read Burst 4 Half-Words Followed by a Write Burst 3 Half-Words

ACCESS_REG
2
ACCESS_GRANT
COMMAND
ADDRESS
DQ
CURRENT_COL
CURRENT_SIZE
DVALID
SAVE_ADD
LAST_DATE
READ (burst reduced to 4) is interrupted by a WRITE request (reduced to 3) pending on a bank and row already active.
Note:
46 Memory Interface Traffic Controller
ACTV0 READ
2
B0/R0 B0/C0
L = 3
C0+1 C0+2
C0 C0+1 C0+2
3 2
STOP
WRITE
B1/C1
Q Q Q Q D
C0+3 C0+4
C0+3 C1+5 C1+6
1 0 2
STOP
D D
C1+1 C1+2 C1+3
C1+7
1 0
SPRU673