Introduction - Texas Instruments OMAP5910 Reference Manual

Memory Interface Traffic Controller
This document describes the OMAP5910 multimedia processor memory
interface traffic controller (TC).
1

Introduction

The memory interface traffic controller (TC) manages all accesses by the
MPU, the TMS320C55x DSP, the system DMA, and the local bus to the
OMAP5910 system memory resources (SRAM, SDRAM, flash, ROM, etc.).
The TC also manages accesses by the MPU or the USB host. The USB host
is an internal OMAP5910 peripheral connected on the local bus, so the TC
contributes to managing USB host accesses.
Figure 1 shows the OMAP5910 device with the traffic controller highlighted.
Figure 2 shows the traffic controller in more detail. Table 1 lists the access
modes and data access width of the controllers (MPU, C55x DSP, system
DMA, and local bus).
SPRU673 Memory Interface Traffic Controller 11