Figure 2.
Traffic Controller
ROM SRAM
16
Flash
SBFlash
Slow
bus
16
SDRAM
Fast
bus
32
Internal
SRAM
bus
S
R
A
Local bus
M
192
KB
SPRU673
To/from
DSP MMU
Traffic controller
E
32
MPU bus
M
I
F
Slow I/F DMA
S
E
Fast I/F DMA
M
I
F
MPU bus
F
SRAM DMA
I
Local bus DMA
M
I
F
32
MMU
32
Local
bus
interface
USB Host I/F
To/from
MPUI port
MPUI
32
32
32
Slow
MPUI-
port
DMA
port
32
Fast
port
TIPB
32
System
DMA
controller
32
SRAM port
Local port
32
MPU TI peripheral
bus (private)
MPU bus
MPU
Memory Interface Traffic Controller
16
32
T
I
32
P
B
b
32
r
port
i
d
32
g
e
Introduction
MPU TI
peripheral
bus (public)
MPU TI
peripheral
bus (private)
13