(2) Watch timer mode control register (TMC2)
This register sets the watch timer operating mode, watch flag set time and prescaler interval time and enables/
disables prescaler and 5-bit counter operations.
TMC2 is set with a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TMC2 to 00H.
Figure 10-3. Watch Timer Mode Control Register Format
7
6
5
Symbol
0
TMC26
TMC25 TMC24
TMC2
TMC20
0
Normal operating mode (flag set at f
1
Fast feed operating mode (flag set at f
TMC21
0
Clear after operation stop
1
Operation enable
TMC22
0
Clear after operation stop
1
Operation enable
TMC23
f
= 5.0 MHz Operation
XX
14
0
2
/f
(0.4 sec)
W
13
1
2
/f
(0.2 sec)
W
TMC26 TMC25 TMC24
0
0
0
2
0
1
0
2
0
1
0
2
0
1
1
2
1
0
0
2
1
0
1
2
Other than above
Setting prohibited
Caution When the watch timer is used, the prescaler should not be cleared frequently.
Remarks
f
W
f
XX
f
X
f
XT
CHAPTER 10 WATCH TIMER
4
3
2
1
0
TMC23
TMC22 TMC21 TMC20
Watch Operating Mode Selection
14
/2
)
W
5
/2
)
W
Prescaler Operation Control
5-Bit Counter Operation Control
Watch Flag Set Time Selection
f
= 4.19 MHz Operation
XX
14
2
/f
(0.5 sec)
W
13
2
/f
(0.25 sec)
W
Prescaler Interval Time Selection
f
= 5.0 MHz Operation
XX
4
/f
(410 s)
2
W
5
/f
(819 s)
2
W
6
/f
(1.64 ms)
2
W
7
/f
(3.28 ms)
2
W
8
/f
(6.55 ms)
2
W
9
/f
(13.1 ms)
2
W
: Watch timer clock frequency (f
: Main system clock frequency (f
: Main system clock oscillation frequency
: Subsystem clock oscillation frequency
After
Address
Reset
FF4AH
00H
f
XT
14
2
/f
W
13
2
/f
W
f
= 4.19 MHz Operation
XX
4
/f
(488 s)
2
W
5
/f
(977 s)
2
W
6
/f
(1.95 ms)
2
W
7
/f
(3.91 ms)
2
W
8
/f
(7.81 ms)
2
W
9
/f
(15.6 ms)
2
W
7
/2
or f
)
XX
XT
or f
/2)
X
X
R/W
R/W
= 32.768 kHz Operation
(0.5 sec)
(0.25 sec)
f
= 32.768 kHz Operation
XT
4
/f
(488 s)
W
5
/f
(977 s)
W
6
/f
(1.95 ms)
W
7
/f
(3.91 ms)
W
8
/f
(7.81 ms)
W
9
/f
(15.6 ms)
W
243