Table C-12: Dynamic Reconfiguration Port Memory Map: MGTA Address 72–76
Bit
(1)
72
Def
15
0
14
0
CLK_COR_SEQ_2_MASK
13
0
12
0
11
0
10
0
9
0
RESERVED
8
0
[14:0]
7
0
CLK_COR_SEQ_2_4
6
0
5
0
4
0
3
0
2
1
1
1
(2)
0
TXCPSEL
X
CLK_COR_SEQ_2_3[10]
Notes:
1. The default X depends on the operation. See
2. This attribute should never be changed from the default setting. Otherwise the MGT can operate below optimum levels, compromising overall performance.