Chapter 6: Analog And Board Design Considerations; Physical Requirements; Power Conditioning - Xilinx Virtex-4 RocketIO User Manual

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Analog and Board Design
Considerations

Physical Requirements

To ensure reliable operation of the Virtex®-4 RocketIO™ MGT, the designer must meet
certain requirements. This section outlines the requirements for power filtering networks,
reference, and high-speed differential clock signal traces. Designs that do not adhere to
these requirements are not supported by Xilinx, Inc.

Power Conditioning

Each MGT has five power supply pins (AVCCAUXTX is shared between two MGTs in a
tile), all of which are sensitive to noise. The Virtex-4 Data Sheet specifies the power supply
pins and power requirements.
system within each tile.
To operate properly, MGTs require a certain level of noise isolation from surrounding noise
sources. For this reason, it is required that both dedicated voltage regulators and passive
high-frequency filtering be used to power the MGT circuitry.
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
Figure 6-1 shows the block diagram of the MGT power
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Chapter 6
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