Trace Routing; Plane Splits; Simulating Lossy Transmission Lines - Xilinx Virtex-4 RocketIO User Manual

R
characteristic impedance requirement. Alternatively, some manufacturers are willing to
compute the initial line widths.
A good PCB manufacturer understands controlled impedance and allows fine adjustments
for line widths to produce a Z
widths based on prior experience and knowledge of the effective dielectric constant due to
the proportions of fiberglass cloth and resin. Although ±10% tolerance on Z
and can provide adequate performance, the additional cost of a tighter tolerance can result
in somewhat better channel performance.

Trace Routing

High-speed serial differential traces are routed with the highest priority to ensure that the
optimal path is available to these critical traces. This reduces the need for bends and vias
and minimizes the potential for impedance transitions. Traces must be kept straight, short,
and with as few layer changes as possible. The impact of vias is discussed in
Vias" in Chapter
Routing of high-speed traces must be avoided near other traces or other potential sources
of noise. Orthogonally crossing striplines over multi-gigibit striplines (as with a
differential edge-coupled offset configuration) is generally discouraged, but could be
feasible if first proven by simulation and/or testing.
With the FGPA placed on the top surface, it is best to route on the lowermost striplines to
minimize via stubs. If routing blockages exist, then vias from lowest to highest striplines
minimize via stub lengths. Microstrips can be used to relieve congestion, especially when
breaking out from the FPGA signal or when launching into a surface-mount connector. A
microstrip break-out from the FPGA has the added benefit of maintaining solid planes
around the FPGA to improve power delivery. (See
Right-angled bends must not be used. Mitered 45° bends are to be used instead. For a 90°
bend, the effective width of the trace changes, causes an impedance discontinuity due to
the capacitive fringing of the outside corner of the conductor to the reference planes.
The two traces of a differential pair must be length-matched to eliminate skew. Skew
creates mismatches causing differential-to-common-mode conversion, which reduces the
differential voltage swing.

Plane Splits

Ground planes should be used as reference planes for signals, as opposed to noisier power
planes. Each reference plane should be contiguous for the length of the trace, because
routing over plane splits creates an impedance discontinuity. In this case, the impedance of
the trace changes because its coupling to the reference plane is changed abruptly at the
plane split. Furthermore, although a differential signal can cross narrow splits, there is a
small common-mode component that cannot do so and is therefore reflected. This can
cause signal distortion either directly, or indirectly by way of power-supply disturbances
and coupling.

Simulating Lossy Transmission Lines

Circuit simulators like HSPICE model a lossy transmission line differently for frequency-
domain simulations (AC sweep) and time-domain simulations (transient run). Therefore,
it is important to check that the models accurately reflect actual losses. One method is to
compare the models against known published configurations.
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
of 50Ω . The manufacturer should calculate the final line
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"BGA Escape Example" in Chapter
Traces
is typical
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