Table C-8: Dynamic Reconfiguration Port Memory Map: MGTA Address 5E–62
Bit
(1)
5E
Def
15
0
14
0
13
0
RESERVED
[5:0]
12
0
11
0
10
0
9
PMA_BIT_SLIP
0
8
X
RXASYNCDIVIDE
[1:0]
7
X
6
X
5
X
4
X
RXCLKMODE
[5:0]
3
X
2
X
1
X
0
RXLB
0
Notes:
1. The default X depends on the operation. See
2. This attribute should never be changed from the default setting. Otherwise the MGT can operate below optimum levels, compromising overall performance.