Bga Packages; Sma Connectors - Xilinx Virtex-4 RocketIO User Manual

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For higher data rates, curved routing can be helpful as an alternative to using mitered
corners. Examples of curved routing are shown in
using curved routing should become more important.

BGA Packages

The MGT signal paths within the BGA package are optimized using a 3D full-wave solver.
Package traces are designed to be 50Ω high-speed transmission lines, while solder ball and
chip-attach (bump) regions are designed to minimize excess capacitance as much as
possible within manufacturing constraints. Bump region excess capacitance is
approximately 50 fF and has the effect of adding to the IC capacitance. Solder ball region
capacitance varies from 100 fF to 250 fF.
The longest package paths have some insertion loss, less than 1 dB worst-case at 5 GHz. To
allow full simulation of package effects, the Xilinx Signal Integrity Simulation kit for
Virtex-4 FPGAs provides extracted S-parameter models of the package.

SMA Connectors

Well-designed SMA connectors can reduce debugging time and allow a high-performance
channel to be designed correctly on the first pass. SMA connectors that perform well in
multi-gigahertz applications need to be simulated, designed, and manufactured to meet
this performance target. Vendors can also offer design guidelines or custom design
services that ensure that the connector works well on a specific board. Assembly
guidelines are crucial in ensuring that the process of mating the connector to the board is
well-controlled to give the specified performance.
Virtex-4 RocketIO MGT User Guide
UG076 (v4.1) November 2, 2008
No jog-outs
No jog-outs
10 mV, 100 ps Per Div.
Figure 11-18: Measured TDR of Differential Pair with Four Mitered 90° Turns,
www.xilinx.com
50 mV, 200 ps Per Div.
With Jog-outs
Turns
Skew
with and without Jog-Outs
Figure 12-4, page
BGA Packages
With jog-outs
Turns & jog-outs
UG072_c3_39_050206
263. For wider lines,
255