Power Section; Technical Description Input Selector 2; General Description; Analog Input And Sync Processing - Barco SLM R12 Plus Service Manual

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11. Signal Input Selection R763850 & R763851
It converts the parallel programming data from the controller into a serial bit stream for the two multiplexing FPGA's I23/I24.
It allows the controller to set the control signals of the modules Input Selector 1 and Input Selector 2 by writing to certain
registers. Also the control lines that determine which input goes to which output channel is set by this controller FPGA according
to the controller's data.
It allows the controller to read the status of the detection signals of input selector 1 and 2.
It multiplexes the sync signals from the four inputs to the two output channels. It also multiplexes the two COAST and CKINV
signals from the PMP channels to the four inputs.
It buffers the data- and address bus and the control signals that go to the two digital inputs.
It has an I²C interface that converts the 8 bit parallel data into an I²C bitstream in order to (re)program the E²PROM on the DVI
inputs.

11.3.1.2.7 Power section.

Description
Following voltages are generated locally from the +15V on the Input board itself:
a +12V with I27
a -12V with the switcher regulator I28
a +5V with the power converter step down regulator I30
The heavily loaded +3.3V supply rail is sensed on the board and the present voltage sent to the SMPS in order to be sure that the
+3.3V supply does not drop too low

11.3.2 Technical Description Input Selector 2

11.3.2.1 General Description

General Description
The input selector II is very similar to the Input Selector I except that this one has a DVI Input but no DVI output.
This input also has a 5-cable configurable input and one DVI (PanelLink*) input.
The input signals are converted into a 48-bit (3x2x8) digital RGB format which go to Input Selector I for multiplexing to the input
channels of the PMP.
Besides signal processing, the board also handles the sync processing and multiplexing (=selection) of the sync for the AMDS
(source identification) on the PMP.
The 5-cable input can handle all possible analog input signals: RGBHV, RGBCS, RGBCV, RGsB, YUVCS, YsUV, video and S-video.
The RGB and YUV signals are applied to an Analog Digital Converter, same type as on Input 1.
The video and S-video signals are routed to a digital decoder and its output is added in parallel to the RGB digital bus (three-state
technology).
The PanelLink* or DVI input allows a direct digital interfacing with a DVI output of a PC or other devices equipped with DVI outputs,
such as scalers.
1
The PanelLink* (
)signals are also processed by a SIL 161
The I8 contains all information required by the DVI source to adapt the resolution.

11.3.2.2 Analog input and sync processing

Description
This section is almost identical to the Input Selection 1 and we refer to this paragraph for a detailed explanation.

11.3.2.3 DVI Input

Description
The DVI input is identical to the DVI Input as described for the Input Selection board 1and is also based upon the SIL161 from Silicon
Image.
74
R5976820 SLM R12+ PERFORMER 08/03/2005

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