GE Vivid 3N Pro Series Service Manual page 173

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GE M
S
EDICAL
YSTEMS
D
FK091075, R
IRECTION
multiplexer in linear probes. In addition, the board generates the following:
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The output from the Beamadders at BF is fed to the RFI (or RFT) board.
5-4-3-3
Transmitter Power Supply
The transmitters on the TR4 boards (HVPS on FB) are fed with high voltage from the TX supply. This
module consists of three linear power supplies; one providing a symmetrical output voltage ranging from
0 to +/- 80 V (HV1), another providing a voltage ranging from 0 to +/- 40 V (HV2), and the third outputting
+/- 80 V for the multiplexers in the linear probes. HV1 and HV2 are programmable through a serial
interface from the FEC board.
5-4-3-4
Mid Processors
The Vivid 3N Front End and visualization system are interconnected through digital signal processing
modules, called the Mid Processors. These processors perform the adequate signal conditioning for the
different data types; Tissue, Doppler and Flow. The current Mid Processors are the RF & Tissue
Processor board (RFT).
5-4-3-4-1
Pipelink Bus
The Mid Processors are interconnected through a data bus system called the Pipelink. This is a
uni-directional bus, transporting data from the pipelink dispatcher (RF & Tissue Processor) through
the accessed processor, to the destination - the Image Port. The Image Port will then map the data
into the Image Memory.
Data leaving the RF & Tissue Processor have a tag indicating what type of data is transported; for
example, tissue, Doppler, 2D Flow. Each of the remaining mid processors decode this tag and
when it matches their own address, the data is processed.
In 2D, data is typically transferred in vector blocks from the RFT board. In Doppler and Color Flow,
data from one range gate is transferred.
5-4-3-4-2
MLA-0 and MLA-1 Buses (RFI configuration only)
The Mid Processors are interconnected through a data bus system called the MLA-0 and MLA-1.
These are uni-directional buses, transporting data from the Beamformer to the Demodulator FPGA
on the RFI.
Data leaving the Demodulator FPGA have a tag indicating what type of data is transported; for
example, tissue, Doppler, 2D Flow. Each of the remaining mid-processor components decode this
tag and when it matches their own address, the data is processed.
In 2D mode, data is typically transferred in vector blocks from the Demodulator FPGA. In Doppler
and Color Flow modes, data from one range gate is transferred.
04
EVISION
a transmit trigger pulse for TR4.
a receive synchronization pulse (SYNC_L) used by Beamformers and RF & Tissue
Processor.
a differential ATGC voltage used by TR4 and control signals for the High Voltage Power
Supply (HVPS).
system master clock generator (40 MHz).
a reset pulse (SRES).
receive focusing control
analog test signal generator
temperature sensing for TEE probes
step motor control for TEE probes
Chapter 5 Components and Function (Theory)
V
3N P
/E
S
IVID
RO
XPERT
ERVICE
M
ANUAL
5-11

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