Panasonic FP-M Hardware Manual page 200

8-5. System Registers
Address Name of system register
402 Pulse catch input function
settings
(pulse of 500 µs or more
duration)
403 Interrupt trigger settings
192
Default
value
H0 This register specifies the pulse catch inputting function
availabilities for X0 to X7.
• Settings
0: standard input mode
1: pulse catch input mode
Input the specific value in an order so that the bit
corresponding to each input becomes "1" when you use the
pulse catch function.
System register 402
Bit position
Corresponding
input
• Setting range
All FP-Ms (8 inputs X0 to X7): H0 to HFF
EXAMPLE:
If the pulse catch function is used for inputs X3, X4, and
X5, input H38 as follows:
System register 402
Bit position
Corresponding
input
Data input
H0 This register specifies inputs of the FP-M as interrupt
triggers.
• Settings
0: standard input mode
1: interrupt input mode
Input the specific value in an order so that the bit
corresponding to each input becomes "1" when you use
interrupt programs.
System register 403
Bit position
Corresponding
input
• Setting range
All FP-Ms (8 inputs X0 to X7): H0 to HFF
EXAMPLE:
If the interrupt input function is used for inputs X1 and X2,
input H6 as follows:
System register 403
Bit position
Corresponding
input
Data input
Description
15 12 11 8 7
• • • • •
X6 X5
X7
15 12 11 8 7
• • • • •
X7 X6 X5
0 0 0 0 0 0 0 0 0 0 1 1
H 3
15 12 11 8 7
• • • • •
X7 X6 X5
15 12 11 8 7
• • • • •
X6 X5
X7
0 0 0 0 0 0 0 0 0 0 0 0
H
4 3 0
• • •
X2 X1
X4 X3 X0
4 3 0
• • •
X4 X3 X2 X1 X0
1 0 0 0
8
4 3 0
• • •
X4 X3 X2 X1 X0
4 3 0
• • •
X2 X1
X4 X3 X0
0 1 1 0
6