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Page 3: Table Of Contents
Table of Contents Chapter 1 Relays, Memory Areas and Constants 1 - 2 Table of Relays, Memory Areas and Constants ......1 - 2 1.1.1 FP0/FP−e...
Page 4 Table of Contents 1 - 79 1.4.4 BCD Type Real Numbers (H) (for FP2, FP2SH and FP10SH) . . . 1 - 80 1.4.5 Character Constants (M) ........1 - 81 Data Ranges Which can be Handled in the PLC .
Page 5 Table of Contents 4 - 16 4.4.2 Operation Mode when an Operation Error Occurs ... . . 4 - 17 4.4.3 Dealing with Operation Errors ......4.4.4 Points to Check in Program .
Page 6 Table of Contents 5.1.18 Special Data Registers for FP2/FP2SH/FP3/FP10SH ..5−176 5.2 Table of Basic Instructions ......... 5−201 5.3 Table of High−level Instructions .
Page 7 Table of Contents Basic Instructions Sequence basic instructions On−delay timer TMX ..2 − 42 On−delay timer TMY ..2 − 42 Start ....2 −...
Page 8 Table of Contents Special setting instructions STF> Floating point real number data comparison: (Start) ..2 − 140 SYS1 Communication conditions STF>= Floating point real number data setting ....2 −...
Page 9 Table of Contents OR<> 16−bit data compare (OR) ....2 − 148 OR> 16−bit data compare (OR) ....2 −...
Page 10 Table of Contents High−level Instructions Data transfer instructions 16-bit data move ......... . 3 −...
Page 11 Table of Contents Control instruction Auxiliary jump ......... . 3 −...
Page 12 Table of Contents 8-digit BCD data addition ....... . 3 − 97 PDB+ 4-digit BCD data addition .
Page 13 Table of Contents 16-bit data OR ........3 −...
Page 14 Table of Contents 16-bit data sign extension ....... 3 − 200 PEXT DECO Decode...
Page 15 Table of Contents F113 WBSL Left shift of one hexadecimal digit (4-bit) of 16−bit data range 3 − 252 P113 PWBSL FIFO instructions F115 FIFT FIFO buffer definition ........3 −...
Page 16 Table of Contents F136 DBCU Number of on (1) bits in 32-bit data ..... . . 3 − 300 P136 PDBCU Basic function instruction F137...
Page 17 Table of Contents F157 CADD Time addition ......... 3 −...
Page 18 Table of Contents F175 SPSH Pulse output (Linear interpolation) ..... . . 3 − 542 F175 SPSH Pulse output (Linear interpolation) .
Page 19 Table of Contents F238 DGBIN 32−bit Gray code → 32−bit binary data ....3 − 596 P238 PDGBIN F240 COLM Bit line to bit column conversion .
Page 20 Table of Contents F278 DSORT Sort data in 32-bit data table ......3 − 649 P278 PDSORT F282...
Page 21 Table of Contents F313 Floating point data division ......3 − 689 P313 F314 Floating point data Sine operation...
Page 22 Table of Contents F336 FABS Floating point real number data absolute ....3 − 735 P336 PFABS F337 Floating point real number data conversion of angle units P337 PRAD (Degrees →...
Page 23 Table of Contents F412 POPB Restoring the index register bank number ....3 − 784 P412 PPOPB File register bank processing instructions F414 SBFL Setting the file register bank number .
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Page 25: Chapter 1 Relays, Memory Areas And Constants
Chapter 1 Relays, Memory Areas and Constants Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 26: Table Of Relays, Memory Areas And Constants
Relays, Memory Areas and Constants Table of Relays, Memory Areas and Constants 1.1.1 FP0/FP−e Numbering Item Function C10/C14 C32/SL1 T32C /C16 Relay External input (X) 208 points (X0 to X12F) Turns on/off based on external input. relay External output (Y) 208 points (Y0 to Y12F) Externally outputs on/off state.
Page 27 Table of Relays, Memory Areas and Constants Item Item Numbering Function Function C10/C14 C32/SL1 T32C /C16 Constant Decimal (K) K−32768 to K32767 (for 16-bit operation) constants K−2147483648 to K2147483647 (for 32-bit operation) Hexadecimal (H) H0 to HFFFF (for 16-bit operation) constants H0 to HFFFFFFFF (for 32-bit operation) −38...
Page 28 Relays, Memory Areas and Constants FP−e Item Number Memory area available for use Function of points Matsushita X0−X12F %IX0.0− Turns on or off based on External input relay %IX12.15 external input. (see note 3) External output relay Y0−Y12F %QX0.0− Outputs on or off state (see note 3) %QX12.15 externally.
Page 29 Table of Relays, Memory Areas and Constants Item Number of Memory area available for use Function points Matsushita External input relay 6 double DWX0−DWX11 %ID0− Code for specifying 32 external (see note 3) words %ID11 input points as a double word (32 bits) of data.
Page 30 Relays, Memory Areas and Constants Notes 1) The points for the timer and counter can be changed by the setting of System register No. 5. The number given in the table above are the numbers when System register No. 5 is at its default setting.
Page 31: Fp0R
Table of Relays, Memory Areas and Constants 1.1.2 FP0R Item Number of points and range of Function memory area available for use C10, C14, C16 C32, T32, F32 Relay External input 1760 points (X0 to X109F) Turns on or off based on external input. Note1) External output (Y)
Page 32 Relays, Memory Areas and Constants Item Item Number of points and range of Function Function memory area available for use C10, C14, C16 C32, T32, F32 Control Master control 256 points instruc- relay points tion tion (MCR) point Number of 256 points labels (JP and LOOP)
Page 33: Fpσ
Table of Relays, Memory Areas and Constants 1.1.3 FPΣ 12k type Item Number Memory area available for use Function of points X0−X31F Turns on or off based on External input relay external input. (see note 1) FPG−C32T/C32TTM 1184 X0−X73F External input relay (see note 1) FPG−C32T2/C32T2TM FPG−C24R2/C24R2TM...
Page 34 Relays, Memory Areas and Constants Item Number of Memory area available for use Function points Data register 32765 words DT0−DT32764 Data memory used in a program. Data is handled in (see note 2) 16-bit units (one word). Link data register 128 words LD0−LD127 A shared data memory which...
Page 35 Table of Relays, Memory Areas and Constants 32k type Item Number of points and range of Function memory area available for use 32TH/C32THTM C32T2H/C32T2HTM C24R2H/C24R2HTM C28P2H/C28P2HTM External input 1184 points (X0 to X73F) Turns on or off based on external input. (see note 1) (X) External output (see 1184 points (Y0 to Y73F)
Page 36 Relays, Memory Areas and Constants Item Number of points and range of Function memory area available for use 32TH/C32THTM C32T2H/C32T2HTM C24R2H/C24R2HTM C28P2H/C28P2HTM Master control relay points (MCR) Number of labels (JP and LOOP) Number of step 1,000 stages ladders 100 subroutines Number of subrou- tines Number of interrupt...
Page 37: Fp−X
Table of Relays, Memory Areas and Constants 1.1.4 FP−X Item Number of points and range of Function memory area available for use C30, C60 Relay External input 1760 points (X0 to X109F) Turns on or off based on external input. Note1) External output (Y)
Page 38 Relays, Memory Areas and Constants Item Item Number of points and range of Function Function memory area available for use C30, C60 Control Differential Unlimited points instruc- instruc points tion Master con- 256 points point trol relay points (MCR) Number of 256 points labels (JP and LOOP)
Page 39: Fp2
Table of Relays, Memory Areas and Constants 1.1.5 Item Numbering Function Relay External input (X) 2,048 points Turn on or off based on external input. relay (X0 to X127F) External (Y) 2,048 points Externally outputs on or off state. output relay (Y0 to Y127F) Internal relay (R) 4,048 points...
Page 40 Relays, Memory Areas and Constants Item Numbering Control Master control relay 256 points points (MCR) instruc- tion Number of labels (JP and Total: 256 points point LOOP) Number of step ladder 1,000 steps (* Note 4) Number of subroutine 100 subroutines Number of interrupt 1 program (periodical interrupt: allows setting of the time interval within the program...
Page 41: Fp2Sh
Table of Relays, Memory Areas and Constants 1.1.6 FP2SH Item Numbering Function Relay External input (X) 8,192 points (X0 to X511F) Turn on or off based on external input. relay External output (Y) 8,192 points (Y0 to Y511F) Externally outputs on or off state. relay Internal relay (R) 14.192 points (R0 to R886F)
Page 42 Relays, Memory Areas and Constants Item Numbering Function Memory Special data (DT) 512 words (DT90000 to Data memory for storing specific data. area register DT90511) Various settings and error codes are stored. Index register (I) 14 words ×16 banks (I0 to ID) Register can be used as an address of memory area and constants modifier.
Page 43: Fp10Sh
Table of Relays, Memory Areas and Constants 1.1.7 FP10SH Item Numbering Function Relay External input (X) 8,192 points (X0 to X511F) Turn on or off based on external input. relay External output (Y) 8,192 points (Y0 to Y511F) Externally outputs on or off state. relay Internal relay (R) 14,192 points (R0 to R886F)
Page 44 Relays, Memory Areas and Constants Item Item Numbering Numbering Function Function Memory Special data (DT) 512 words Data memory for storing specific data. area register (DT90000 to DT90511) Various settings and error codes are stored. Index register (I) 14 words ×16 banks (I0 to ID) Register can be used as an address of memory area and constants modifier.
Page 45: Relay Numbers
Table of Relays, Memory Areas and Constants 1.1.8 Relay Numbers External input relays (X), External output relays (Y), Internal relays (R), Link relays (L) and Pulse relays (P) Since these relays are handled in units of 16 points, they are expressed as a combination of decimal and hexadecimal numbers as shown below.
Page 46 Relays, Memory Areas and Constants External input relay (X) and External output relay (Y) Only relays with numbers actually allocated to input contacts can be used as external input relay (X). Only relays with numbers actually allocated to output contacts can output as external output relay (Y).
Page 47 Table of Relays, Memory Areas and Constants Relation of WX, WY, WR and WL to X, Y, R and L WX, WY WR and WL correspond respectively to groups of 16 external input relay (X) points, 16 external output relay (Y) points, 16 internal relay (R) points and 16 link relay (L) points.
Page 48: Explanation Of Relays
Relays, Memory Areas and Constants Explanation of Relays 1.2.1 External Input Relays (X) Function of external input relays (X) This relay feeds signals to the programmable controller from an external device such as a limit switch or a photoelectric sensor. Program X contact: on Input...
Page 49: External Output Relays (Y)
Explanation of Relays 1.2.2 External Output Relays (Y) Function of external output relays (Y) This relay outputs the program execution result of the programmable controller and activates an external device (load) such as a solenoid, operating panel or intelligent unit. The on or off status of the external output relay is output as a control signal.
Page 50: Internal Relays (R)
Relays, Memory Areas and Constants 1.2.3 Internal Relays (R) Function of internal relays (R) This relay can be used only within program and on or off status does not provide an external output. When the coil of the relay is energized, its contacts turn on. Internal relay F0 MV...
Page 51 Explanation of Relays Non−hold type relay and hold type relay There are two types of internal relays: hold type relays and non−hold type relays. When the power is turned off or the mode changed from RUN to PROG., − Hold type relays hold their on or off status and resume operation in that status when the system is restarted.
Page 52: Special Internal Relays
Relays, Memory Areas and Constants 1.2.4 Special Internal Relays Function of special internal relays The special internal relays turn on or off under specific conditions. The on or off state is not externally output and only functions within the program. The principal special internal relays are as follows: Operation status flags: Operation status is indicated by on or off.
Page 53: Link Relays (L) For Fpσ, Fp−X, Fp0R
Explanation of Relays 1.2.5 Link Relays (L) for FPΣ, FP−X, FP0R Function of link relays (L) Link relays are relays used for the PC Link, that can be shared between multiple programmable controllers when they are connected using a PLC link. If calculation results are output to the link relay (coil) of a certain PLC, the results are also sent to other PLC connected with MEWNET, and will be reflected in link relay (contact) that have the same number.
Page 54 Relays, Memory Areas and Constants Specifying hold type and non−hold type relays There are two types of link relays, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. Hold type relays, which hold the on or off status in effect immediately prior to stopping, during the period between stopping and resuming operation Non−hold type relays, which are reset when operation stops...
Page 55: Link Relays (L) For Fp2/Fp2Sh/Fp10Sh
Explanation of Relays 1.2.6 Link Relays (L) for FP2/FP2SH/FP10SH Function of link relays (L) Link relays are relays used for the PC Link, that can be shared between multiple programmable controllers when they are connected using a MEWNET link. The following types of MEWNET links are available. −...
Page 56 Relays, Memory Areas and Constants Available range of link relays The available range of link relays varies depending on the type of network and the combination of units. The available range and number of points must be specified separately for each network. For MEWNET−W and MEWNET−P: A maximum of 1,024 points are available with one link unit.
Page 57 Explanation of Relays Specifying hold type and non−hold type relays There are two types of link relays, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. Hold type relays, which hold the on or off status in effect immediately prior to stopping, during the period between stopping and resuming operation Non−hold type relays, which are reset when operation stops...
Page 58 Relays, Memory Areas and Constants Usage restrictions When used as contacts, there are no restrictions on the number of times that can be used. As a rule, when specified as the output destination for operation results of OT instruction and KP instruction, use is limited to once in a program (to inhibit double output). Notes System register 20 can be used to permit double output.
Page 59: Timer (T)
Explanation of Relays 1.2.7 Timer (T) Function of timers (T) When a timer is activated and the set time elapses, the timer contact with the same number as the timer turns on. When the timer is in the time−up state and the timer execution condition turns off, the timer contact turns off.
Page 60: Counter (C)
Relays, Memory Areas and Constants 1.2.8 Counter (C) Function of counters (C) When the decrement−type preset counter is activated and the elapsed value reaches zero, the counter contact with the same number as the counter turns on. When the counter’s reset input is turned on, the counter contact turns off. Counter number Count input Reset input...
Page 61: Items Shared By The Timer And Counter
Explanation of Relays 1.2.9 Items Shared by the Timer and Counter Timer and counter partitioning Timers and counters share the same area. The partitioning of the area can be changed to obtain the number of timers or counters needed. Partition the area by setting system register 5. If the initial number of the counter is specified, those prior to that point will be timers, and those subsequent to that point will be counters.
Page 62 Relays, Memory Areas and Constants Even if specifying for the unit without batteries, the data will be indefinite. Non-hold type Value of system register 6 (initial number of hold type) Hold type Default settings for hold types and non−hold types Type Non−hold type Hold type...
Page 63: Pulse Relays (P)
Explanation of Relays 1.2.10 Pulse Relays (P) Note Pulse relays (P) can only be used with the FP2/FP2SH/FP10SH. Function of pulse relays (P) A pulse relay (P) goes on for one scan only. The on or off state is not externally output and only operates in the program.
Page 64 Relays, Memory Areas and Constants Usage restrictions Pulse relays are cleared when the power is turned off. A pulse relay can only be used once in a program as an output destination for an OT↑ or OT↓ instruction (double output is prohibited). There is no limitation to the number of times a pulse relay can used as a contact.
Page 65: Error Alarm Relays (E)
Explanation of Relays 1.2.11 Error Alarm Relays (E) Note Error alarm relays can only be used with the FP2SH/FP10SH. Function of error alarm relays (E) Error alarm relays are used to feed back error conditions freely assigned by the user to internal relays, and to store them in memory.
Page 66 Relays, Memory Areas and Constants Example: If X0 goes on when an error occurs Set E15 X0 : on No. of error alarm relays DT90400 which are on DT90401 Relay numbers DT90402 of error alarm relay which are DT90403 DT90404 DT90405 Data of calen- dar timer which...
Page 67 Explanation of Relays Clearing buffer areas and initial data Of the areas in which relay numbers are stored, only DT90400 and DT90401 can be cleared by directly specifying the special data register with the RST instruction. If DT90400 is specified, all error information in the buffer is cleared, and if DT90401 is specified, the initial relay number in the buffer area is cleared.
Page 68: Explanation Of Memory Areas
Relays, Memory Areas and Constants Explanation of Memory Areas 1.3.1 Data Register (DT) Function of data registers (DT) Data registers are memory areas which are handled in word (16−bit) units, and are used to store data such as numerical data configured of 16 bits. Bit position 15 1211 ·...
Page 69 Explanation of Memory Areas Non−hold type data and hold−type data There are two types of data registers which handle data differently when the power is turned off or the mode is changed from RUN to PROG.: − Hold type data registers hold their contents while operation stops and allow operation to be restarted with the contents still effective.
Page 70: Special Data Registers (Dt)
Relays, Memory Areas and Constants Note With the FP2SH/FP10SH, system register 4 can be set in such a way that the data registers are not cleared even if the Initialize/ Test switch is set to the upper side. 1.3.2 Special Data Registers (DT) Function of the special data registers These data registers have specific applications.
Page 71 Explanation of Memory Areas Clock/calendar (can be used with all types of the FP0 T32C, FP0R, FP−e, FPΣ, FP−X, FP2, FP2SH and FP10SH) The year, month, day, hour, minute, second, and day of the week tracked by the calendar timer are stored here (DT9053 to DT9057/DT90053 to DT90057). Note The values stored for the clock/calendar can be overwritten (to calibrate the date and time).
Page 72: File Registers (Fl)
Relays, Memory Areas and Constants 1.3.3 File Registers (FL) Function of file registers (FL) File registers are memory areas which are handled in word (16−bit) units, and are used to store data such as numerical data configured of 16 bits. They can be used in exactly the same way as data registers.
Page 73: Wx, Wy, Wr And Wl
Explanation of Memory Areas 1.3.4 WX, WY, WR and WL Function of WX, WY, WR and WL Relays (X, Y, R, L) can be handled as blocks of 16 points. These are one−word (16−bit) memory areas, thus they can be treated as data memory. The composition of the one−word memory areas is as follows.
Page 74: Link Data Registers (Ld) For Fpσ/Fp−X/Fp0R
Relays, Memory Areas and Constants 1.3.5 Link Data Registers (LD) for FPΣ/FP−X/FP0R Function of link data registers (LD) Link data registers are data memories for “PC links”, which are shared between multiple programmable controllers which are connected through the same network link. When data is written to a link data register of one PLC, the contents are stored in the link data registers that have the same numbers, in other PLCs connected through the network.
Page 75 Explanation of Memory Areas Specifying hold type and non−hold type registers There are two types of link data registers, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. −...
Page 76: Link Data Registers (Ld) For Fp2/Fp2Sh/Fp10Sh
Relays, Memory Areas and Constants 1.3.6 Link Data Registers (LD) for FP2/FP2SH/FP10SH Function of link data registers (LD) Link data registers are data memories for “PC links”, which are shared between multiple programmable controllers which are connected through the same MEWNET link. The following types of MEWNET links are available.
Page 77 Explanation of Memory Areas Available range of link data registers The available range of link data registers varies depending on the type of network and the combination of units. The available range and number of points must be specified separately for each network. For MEWNET−W and MEWNET−P: A maximum of 128 words can be used with one link unit.
Page 78 Relays, Memory Areas and Constants Specifying hold type and non−hold type registers There are two types of link data registers, which can be switched when the power is turned off and the mode is switched from RUN to PROG and operation is stopped. −...
Page 79 Explanation of Memory Areas Example: Non−hold type System register 12 Hold type LD127 Non−hold type LD128 System register 13 Hold type LD255 Non−hold type LD256 System LD8447 register 17 Hold type Note Link data registers must be allocated when the network is configured, before programming is done.
Page 80: Set Value Area For Timer/Counter (Sv)
Relays, Memory Areas and Constants 1.3.7 Set Value Area for Timer/Counter (SV) Function of set value areas (SV) A set value for a timer or counter is stored in the set value area (SV) with the same number as the timer or counter. Set value TM n, K30 (Decimal number)
Page 81: Elapsed Value Area For Timer/Counter (Ev)
Explanation of Memory Areas 1.3.8 Elapsed Value Area for Timer/Counter (EV) Function of elapsed value areas (EV) While a timer or counter is operating, the elapsed value is stored in the elapsed value area (EV) with the same number as the timer or counter. When the EV reaches zero, the timer or counter contact with the same number turns An EV is a one−word, 16−bit memory area which stores a decimal number from K0 to K32767.
Page 82: Index Registers (Ix, Iy) (For Fp0, Fp−E)
Relays, Memory Areas and Constants 1.3.9 Index Registers (IX, IY) (for FP0, FP−e) Function of index registers (IX, IY) Index registers are used to indirectly specify constants and memory area addresses. Two 16−bit registers are available, IX and IY. Changing addresses and constants using a value in an index register is called “index modification”.
Page 83 Explanation of Memory Areas Index modification method Example 1: Modifying a destination address F0 MV, DT 0, IX IX setting F0 MV, K100, IXWR0 The value of DT0 determines the WR address where K100 is written. When the DT0 value is K10, K100 is written to WR10. →...
Page 84 Relays, Memory Areas and Constants Cautions when using index registers An index register can not be modified with an index register. IXIX, IXIY If the result of address modification overflows the memory area, an operation error will result. When the address resulting from modification is negative or a large number. When modifying 32−bit constants, IX is specified.
Page 85: Index Registers (I0 To Id) (For Fpσ/Fp−X/Fp0R)
Explanation of Memory Areas 1.3.10 Index Registers (I0 to ID) (for FPΣ/FP−X/FP0R) Function of index registers (I0 to ID) Index registers are used for indirect specification of values to addresses and operands in relays and memory areas. There are a total of 14 index registers which can be used with the FPΣ, consisting of I0 to I9 and IA to ID.
Page 86: Index Registers (I0 To Id) (For Fp2, Fp2Sh And Fp10Sh)
Relays, Memory Areas and Constants 1.3.11 Index Registers (I0 to ID) (for FP2, FP2SH and FP10SH) Function of index registers (I0 to ID) Index registers are used for indirect specification of values to addresses and operands in relays and memory areas. Changing an address or a constant using an index register value is called “index modification”.
Page 87 Explanation of Memory Areas The following index modifications are possible Memory area numbers used with high-level instructions K constants (16-bit and 32-bit) and H constants (16-bit and 32-bit) specified with high-level instructions Relay numbers used with the following basic instructions: ST, ST/, AN, AN/, OR, OR/, OT, KP, SET, RST, OT↑, OT↓...
Page 88 Relays, Memory Areas and Constants Modification of memory area numbers specified by high−level instructions Address = Base address + value in I0 through ID (K constant) Example: Modifying DT11 I0DT11 Base address I0 value Target address DT11 DT21 K−10 Example 1: Modifying a destination address F0 MV, DT 0, I0 I0 setting F0 MV, K100, I0DT100...
Page 89 Explanation of Memory Areas Modification of values of constants specified by high−level instructions Constant = Base value + value in I0 through ID Example 1: Modifying 16-bit constant K100 I0K100 Base value I0 value 16-bit constant K100 K100 K100 K110 K100 K−10 Example 2: Modifying 16-bit constant H10...
Page 90 Relays, Memory Areas and Constants Modification of relay numbers specified by basic instructions Number = Base number + value in I0 through ID (K constant / H constant) Example: Modifying X10 IAX10 Base number IA value Target number H−10 K−11 Example 1: Modifying a trigger F0 MV, DT 0, I0 I0 setting...
Page 91 Explanation of Memory Areas Example 3: Modifying a destination address F0 MV, DT 0, I0 I0 setting F0 MV, K100, I0WR0 The value of DT0 determines the address of WR where K100 is written. When the value of DT0 is K10, K100 is written to WR10. WR10 →...
Page 92 Relays, Memory Areas and Constants Items requiring particular attention For the external input relay (X), external output relay (Y), and internal relay (R), when using index modification on relay numbers, be aware that the last digit of the relay number is hexadecimal and the first digits are decimal. Example: For external input relay (X) ×...
Page 93 Explanation of Memory Areas Modifying instruction numbers of basic instructions Timer numbers Modifying TML20 −−− TML I020 Counter numbers Modifying CT3000 −−− CT I03000 Shift register numbers Modifying SRWR0 −−− SR I0WR0 Master control numbers Modifying MCE1 −−− MCE I01 Label number specification with the Jump instruction Modifying JP1 −−−...
Page 94 Relays, Memory Areas and Constants Changing index register banks (for FP2SH/FP10SH only) The banks of the index registers of the FP2SH/FP10SH can be changed to allow use of up to 224 points (14 points × 16 banks) in a program. Bank Bank Bank...
Page 95 Explanation of Memory Areas Example 1: Changing banks using a register bank setting instruction F410 (SETB) I0 to ID of bank 0 R9010 F410 SETB, H 1 F410 SETB, H 1 I0 to ID of bank 1 R9010 F410 SETB, H 2 I0 to ID of bank 2 R9010...
Page 96: Explanation Of Constants
Relays, Memory Areas and Constants Explanation of Constants 1.4.1 Integer Type Decimal Constants (K) Function of decimal constants (K) This is binary data that has been converted to the decimal format. When entering and reading a decimal constant, specify the value by entering a K at the beginning.
Page 97: Hexadecimal Constants (H)
Explanation of Constants 1.4.2 Hexadecimal Constants (H) Function of hexadecimal constants (H) Hexadecimal constants are values which have been converted from binary into hexadecimal. When entering and reading a hexadecimal constant, specify the value by entering an H at the beginning. Hexadecimal constants are primarily used to specify an ordering of 1’s and 0’s in 16−bit data, such as system register settings and specification of control data for high−level instructions.
Page 98: Floating Point Type Real Numbers (F)
Relays, Memory Areas and Constants 1.4.3 Floating Point Type Real Numbers (f) Available PLC FP0, FP0R, FP−e, FPΣ, FP−X, FP2, FP2SH and FP10SH Range of floating point type real numbers that can be used in operations The range of floating point type real numbers that can be stored in the memory area is as noted below.
Page 99 Explanation of Constants Processing of floating point type real number operations 1) Processing by specifying an integer device Instructions can be used to store data in a specific location. Adding the symbol % or # to either S (source: the area from which the data is loaded) or D (destination: the area in which the result is stored) determines how the data is processed.
Page 100 Relays, Memory Areas and Constants In processing involving an integer device specification and real numbers being converted to integers, the processing is the same as that of the F327 (INT) instruction. If the real−number data is a positive number, the number is rounded off, and any digits to the right of the decimal point are discarded.
Page 101 Explanation of Constants Example 2: When conversion is carried out by rounding down the digits to the right of the decimal point converted to F329 FIX, DT0, DT10 16−bit integer converted to F330 DFIX, DT0, DT10 32−bit integer Digits to the right of the decimal point are rounded down. If the real−number data is 1.5, it is converted as integer data If the real−number data is −1.5, it is converted as integer data K−1.
Page 102 Relays, Memory Areas and Constants 3) Direct specification of the real−number constant data When operations are being carried out on real−number constants as real−number data, the values can be directly input by using a programming tool in which “f” is added either to the target data “S”...
Page 103: Bcd Type Real Numbers (H) (For Fp2, Fp2Sh And Fp10Sh)
Explanation of Constants 1.4.4 BCD Type Real Numbers (H) (for FP2, FP2SH and FP10SH) Range of BCD type real numbers that can be used in operations The range of real−number data that can be stored in the memory area is as noted below. −9999.9999 to +9999.9999 Data stored in the memory area in one−word units, with the positive/negative sign coming first, followed by the integer segment and then by the decimal point and any...
Page 104: Character Constants (M)
Relays, Memory Areas and Constants 1.4.5 Character Constants (M) Function of character constants (M) The character constant is used to express ASCII code in binary. The character constant is expressed by adding the prefix M to the data. There are only two instructions in which character constants can be specified, F95 (ASC) instruction, F257 to F265 (SYS1) instruction and F149 (MSG) instruction.
Page 105: Data Ranges Which Can Be Handled In The Plc
1.5 Data Ranges Which can be Handled in the PLC Data Ranges Which can be Handled in the PLC 1.5.1 Data Ranges Which can be Handled in the PLC 16−bit data Decimal Hexadecimal Data which can be handled in the PLC (16−bit binary data) constants constants 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1...
Page 106 Relays, Memory Areas and Constants Expression of decimal numbers in PLC Decimal number is basically processed in 16-bit or 32-bit binary. The most significant bit (MSB) expresses negative or positive sign of the data. When the MSB is “0”, data is regarded as having a zero or positive value and when the MSB is “1”, data is regarded as having a negative value.
Page 107 1.5 Data Ranges Which can be Handled in the PLC Data ranges which can be handled in the PLC Binary data which can be handled by programmable controllers are: 16-bit binary data: K-32768 to K32767 32-bit binary data: K-2147483648 to K2147483647 BCD code which can be handled by programmable controllers are: 16-bit (4-digit BCD H code): H0 to H9999 32-bit (8-digit BCD H code): H0 to H99999999...
Page 108: Overflow And Underflow
Relays, Memory Areas and Constants 1.5.2 Overflow and Underflow Operation instructions occasionally produce a value which is outside of the allowed range. This is called overflow if the value exceeds the maximum value and underflow if the value falls short of the minimum value. When an overflow or underflow occurs, the carry flag R9009 turns on.
Page 109 1.5 Data Ranges Which can be Handled in the PLC Values when overflow or underflow occurs Numerical value handled by the FP series programmable controller all form a loop joined at the maximum value and the minimum value as shown below. 16−bit binary operation Overflow K 32767...
Page 110 Relays, Memory Areas and Constants 1 - 86 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 111: Chapter 2 Basic Instructions
Chapter 2 Basic Instructions Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 112 Basic Instructions 2 - 2 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 113: Composition Of Basic Instructions
Composition of Basic Instructions Composition of Basic Instructions 2.1.1 Sequence Basic Instructions These basic instructions perform bit unit logic operations and are the basis of the relay sequence circuit. As shown in the illustration below, this is expressed by the combination of the relay coil and contact.
Page 114: Basic Function Instructions
Basic Instructions 2.1.2 Basic Function Instructions These are the timer, counter and shift register instructions. To specify set values, the instructions are composed of several steps. Example: Example of setting 3.0 seconds in the 0.1 second timer (timer 5) Timer 5 (0.1 s units timer) Set value TMX 5 K 30...
Page 115: Data Compare Instructions
Composition of Basic Instructions Interrupt program In addition to the normal program, enter an interrupt program (specified with INT or IRET) if you need a program which will execute immediately when a certain condition is met. When an interrupt is received, the normal program is interrupted and the interrupt program is executed.
Page 116: Number Of Steps In The Fp2, Fp2Sh And Fp10Sh
Basic Instructions Number of Steps in the FP2, FP2SH and FP10SH Number of steps in basic instructions Of the basic instructions used with the FP2, FP2SH and FP10SH, the number of steps in the following instructions changes depending on the number specified. Sequence basic instructions With Start (ST), Out (OT), And (AN), Or (OR), and Keep (KP), the number of steps making up the instruction changes depending on the relay number which has been...
Page 117 Number of Steps in the FP2, FP2SH and FP10SH Control and subroutine instructions Steps Instructions Instructions Normal specification With index modification LOOP CALL FCAL Note Index modification is possible only with the FP2, FP2SH and FP10SH.Table of Basic Instructions 2 - 7 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 118 Basic Instructions Start Start Not Outline ST, ST/: Begins a logic operation. Outputs the operation result. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Start Start Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction (*4) (*1) (*2) (*3) ST, ST/ Available...
Page 119 Basic Instructions Precautions during programming The ST and ST/ instructions start from the bus line. The OT instruction cannot start directly from the bus line. The OT instruction can be used consecutively. Some input devices, such as emergency stop switches, usually have a Form B (normally closed) contact. When an emergency stop switch with a Form B contact is programmed, be sure to use the ST instruction.
Page 120 Basic Instructions Outline Inverts the operation result up to this instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Explanation of example Y10 goes on and Y11 goes off when X0 turns on. Y10 goes off and Y11 goes on when X0 turns off. Description The / instruction inverts the operation result up to this instruction.
Page 121 Basic Instructions AND Not Outline AN: Connects Form A (normally open) contacts in series. AN/: Connects Form B (normally closed) contacts in series. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction AND Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction...
Page 122 Basic Instructions OR Not Outline OR: Connects Form A (normally open) contacts in parallel. OR/: Connects Form B (normally closed) contacts in parallel. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction OR Not Operands Timer/Counter Relay Index Contact modifier modifier Instruction Instruction...
Page 123 Basic Instructions Precautions during programming Use the OR instruction when normally open contacts (Form A contacts) are connected in parallel. Use the OR/ instruction when normally closed contacts (Form B contacts) are connected in parallel. The OR instruction starts from the bus line. The OR and OR/ instructions can be used consecutively.
Page 124 Basic Instructions ↑ Leading edge Start ↓ Trailing edge Start ↑ Leading edge AND ↓ Trailing edge AND Availability ↑ Leading edge OR FP2/FP2SH/FP10SH FP−X (V2.00 or more) FPΣ (V3.10 or more) ↓ Trailing edge OR FP0R Outline Contact instructions for leading edge detection and trailing edge detection Logic processing is only carried out during the scan following detection of a leading edge or trailing edge in the signal.
Page 125 Basic Instructions Explanation of example ST↑, AN↑ and OR↑ instructions Output to Y10 takes place for one scan only following a change in X0 from off to on. One scan One scan Leading edge Leading edge Output to Y11 takes place for one scan only following a change in X2 from off to on when X1 is on. One scan Output to Y12 takes place for one scan only following a change in X3 or X4 from on to off.
Page 126 Basic Instructions ↑ Leading edge Out ↓ Trailing edge Out Outline Leading edge detection and trailing edge detection output The result of processing is output to the pulse relay for one scan only. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction OT↑...
Page 127 Basic Instructions Description OT↑ instructions Output to the pulse relay takes place for one scan only following a change in the immediately previous processing result from off to on. The pulse relay goes on for one scan only. OT↓ instructions Output to the pulse relay takes place for one scan only following a change in the immediately previous processing result from on to off.
Page 128 Basic Instructions Alternative out Outline Inverts the output condition each time the leading edge of the signal is detected. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Alternative out Operands Timer/Counter Relay Index Contact Instruction Instruction modifier modifier Available N/A N/A N/A: Not Available Explanation of example...
Page 129 Basic Instructions AND stack Outline Multiple blocks are connected in series. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Block 2 Block 1 Explanation of example Y10 goes on when X0 or X1 and X2 or X3 turn on. (X0 OR X1) AND (X2 OR X3) →...
Page 130 Basic Instructions When blocks are consecutive When blocks are consecutive, a division of the blocks should be considered, such as that shown below. block block block block block block ... block block block...
Page 131 Basic Instructions OR stack Outline Multiple blocks are connected in parallel. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Block 1 Block 2 Explanation of example Y10 goes on when both X0 and X1 or both X2 and X3 turn on. (X0 AND X1) OR (X2 AND X3) →...
Page 132 Basic Instructions When blocks are consecutive When blocks are consecutive, a division of the blocks should be considered, such as that shown below. block block 4 block block block block block ..block block .
Page 133 Basic Instructions PSHS Push stack Read stack POPS Pop stack Outline PSHS: Stores the operation result up to this instruction. RDS: Reads the operation result stored by the PSHS instruction. POPS: Reads and clears the operation result stored by the PSHS instruction.
Page 134 Basic Instructions Description One operation result can be stored in memory and read, and multiple processes performed. PSHS (stores operation result): Stores the operation result up to this instruction and continues execution from the next step. RDS (reads operation result): Reads the operation result stored using the PSHS instruction and, using this result, continues operation from the next step.
Page 135 Basic Instructions Caution regarding repeated use of a PSHS instruction The PSHS instruction is limited in the number of times that it can be used consecutively. The number of times that the instruction can be used consecutively before the next POPS instruction is as shown below. Type No.
Page 136 Basic Instructions Leading edge differential Trailing edge differential Outline DF: Turns on the contact for only one scan when the leading edge of the trigger is detected. DF/: Turns on the contact for only one scan when the trailing edge of the trigger is detected.
Page 137 Basic Instructions Description The DF instruction executes and turns on output for only one scan duration when the trigger changes from an off to an on state. The DF/ instruction executes and turns on output for only one scan duration when the trigger changes from an on to an off state.
Page 138 Basic Instructions Caution is required when using a differential instruction with instructions which change the order of instruction execution such as MC and MCE or JP and LBL (below instructions). − MC to MCE instructions − JP to LBL instructions −...
Page 139 Basic Instructions Application example for alternating circuit A differential instruction can also be applied to an alternating circuit to hold and release the circuit using a single signal. Example 1: Example 2: 2 − 29 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 140 Basic Instructions Leading edge differential (initial execution type) Outline When a leading edge of signal is detected, the contact goes on during that scan only. Leading edge detection is possible at the first scan. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Leading edge differential...
Page 141 Basic Instructions Precautions during programming When used with instructions which change the order of execution such as MC to MCE and JP to LBL (see below), caution must be exercised. − MC to MCE instructions − JP to LBL instructions −...
Page 142 Basic Instructions Reset Outline SET: When the execution conditions have been satisfied, the output is turned on, and the on status is retained. RST: When the execution conditions have been satisfied, the output is turned off, and the off status is retained. Program example Boolean Ladder Diagram...
Page 143 Basic Instructions When SET and RST instructions are used When the SET and RST instructions are used, the output changes with each step during processing of the operation. Example: When X0, X1, and X2 are turned on 〈 This portion of the program is processed as if Y10 were on.
Page 144 Basic Instructions Keep Outline This is output which is accompanied by set or reset input, and which is retained. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Set input KP R 30 Reset input Output destination Operands Timer/Counter Relay Index Contact modifier...
Page 145 Basic Instructions No operation Outline No operation Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ・ Description This instruction has no effect on the operation result to that point. The same operation takes place without a NOP instruction. The NOP instruction can be used to make the program easier to read when checking or correcting. When you want to delete an instruction without changing addresses, write a NOP instruction (overwrite the previous instruction).
Page 146 Basic Instructions Timer (0.001s units) Outline Sets the on-delay timer for 0.001s units Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Timer instruction number Timer unit Set value 5, K 300 Timer contact of timer No. 5 Operands Timer/ Index Relay Register...
Page 147 Basic Instructions Setting the time in the timer The time setting is equal to the time increment multiplied by the value set in the timer. The value set in the timer can be a decimal value within the range K1 to K32767. The time increment is 0.001 seconds, producing a time range of 0.001 to 32.767 seconds.
Page 148 Basic Instructions When the value in the elapsed value area EV reaches zero, the timer contact T with the same number goes on. TML5, K300 Decrement operation ends Important points when specifying constant (K) The constant (K) can be changed during RUN. A specified constant (K) cannot be modified by index modification.
Page 149 Basic Instructions With each scan, the value in the elapsed value area EV decrements if the trigger (execution condition) is on. Transfer to EV area F0 MV, K30, SV5 TML5, DT0 Decrement When the value in the elapsed value area EV reaches zero, the timer contact T with the same number goes on.
Page 150 Basic Instructions Example: Modifying a timer number TML I05, DT 0 When I0 = K10, the timer operates as TML15. − Setting value area: DT0 − Elapsed value area: EV15 − Timer contact: T15 The timer contact can also be modified by index modification.
Page 151 Basic Instructions Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart X1 X0 F0 MV, K 500, DT 0 (MV) X0 X1 F0 MV, K 300, DT 0 TML 5, DT 0 0.5s...
Page 152 Basic Instructions Timer (0.01s units) Timer (0.1s units) Timer (1.0s units) Outline TMR:Sets the on-delay timer for 0.01 s units TMX: Sets the on-delay timer for 0.1 s units TMY: Sets the on-delay timer for 1.0 s units Program example Boolean Ladder Diagram Ladder Diagram...
Page 153 Basic Instructions Timer set time The formula of the timer set time is [the time unit] × [set value] The timer setting [n] must be a decimal constant from K1 to K32767. − TMR is from 0.01 to 327.67 seconds in increments of 0.01 seconds. −...
Page 154 Basic Instructions When the value in the elapsed value area (EV) reaches zero, the timer contact (T) with same number turns on. TMX 5, K 30 Decrement operation ends Examples of timer instruction applications Serial connection of timer Ladder diagram Boolean Time chart TMX 0, K 30...
Page 155 Basic Instructions Directly specifying a set value area number as a timer setting value With FP0/FP−e/FPΣ/FP−X/FP2/FP2SH/FP10SH with a CPU Ver. 4.4 or later with a CPU Ver. 2.7 or later, the set value area number can be specified directly as the set value n. .
Page 156 Basic Instructions Timer operation when a set value area number is directly specified When the trigger for a high−level instruction is on, the value is set in the set value area (SV). The following diagram shows an example of using the high−level instruction F0(MV). Set value F0 MV, K30, SV5 TMX 5, SV 5...
Page 157 Basic Instructions Examples of applying direct specification of set value area numbers Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart X1 X0 F0 MV, K 50, SV 5 (MV) X0 X1...
Page 158 Basic Instructions Counter Outline Decrements a preset counter. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Count number Count input Reset input Elapsed value Set value C 100 Counter contact for counter no. 100 (example showing a case where 100 and subsequent numbers are specified for counters) Operands...
Page 159 Basic Instructions Description The counter is a decremental preset counter. At the fall time when the reset input goes from on to off, the value of the set value area (SV) is preset in the elapsed value area (EV). When the reset input is on, the elapsed value is reset to 0. When the count input changes from off to on, the set value begins to decrement, and when the elapsed value reaches 0, the counter contact Cn (n is the counter number) turns on.
Page 160 Basic Instructions When the value in the elapsed value area (EV) reaches zero, the counter contact (C) with the same number turns on. CT 100 SV100 EV100 Decrement operation ends C100 Precaution during programming When combining a counter instruction with an AND stack instruction or pop stack instruction, take care that the syntax is correct.
Page 161 Basic Instructions Directly specifying a set value area number as a counter set value With FP0/FP−e/FPΣ/FP−X/FP2/FP2SH/FP10SH with a CPU of Ver. 4.4 or later, the set value area number can be specified directly as the set value n... F0 MV, K30, SV100 .
Page 162 Basic Instructions Counter operation when a set value area number is directly specified When the trigger for a high−level instruction is on, the value is set in the set value area (SV). The following diagram shows an example of using the high−level instruction F0 (MV). F0 MV, K30, SV100 SV100 Transfers to SV area...
Page 163 Basic Instructions Examples of applying direct specification of set value area numbers Changing set values based on specified conditions The set value is K50 when X0 is on and K30 when X1 is on. Ladder diagram Boolean Time chart Example when X0 turns on X1 X0 F0 MV, K 50, SV 100 (MV)
Page 164 Basic Instructions Shift register Outline One bit shift of 16-bit [word internal relay (WR)] data to the left. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction SR WR 3 Data input Shift input Reset input Operands Index Index Relay Timer/Counter Register Constant...
Page 165 Basic Instructions Description Shifts the specified data area (WR) one bit to the left. When the shift input turns on (rises), the contents of WR are shifted one bit to the left. During the shift, 1 is set in the empty bit (least significant bit) if the data input is on, or 0 if the data input is off. When shift input is turned on: .
Page 166 Basic Instructions Cautions on shift input detection With SR instructions, shift operation takes place when the off−on rise of the shift input is detected. If the shift input remains continuously on, a shift will only take place at the rise. No further shifts will take place. In cases where the shift input is initially on such as when the mode is changed to RUN or when the power is turned on with the mode set to RUN, a shift operation will not take place at the first scan.
Page 167 Basic Instructions Master control relay Master control relay end Outline Executes the program between the MC and MCE when the execution condition turns on. When the execution condition is off, output between the MC and MCE is turned off. Program example Boolean Ladder Diagram Ladder Diagram...
Page 168 Basic Instructions Description Executes program between the MC and MCE instructions when the execution condition turns on. When the execution condition is in the off state, the instructions operate as follows. Instruction Condition of input and output All off Holds the state. Holds the state.
Page 169 Basic Instructions Operation of differential instructions between MC and MCE If a differential instruction is used between MC and MCE, the output will vary as follows depending on the timing of the MC execution condition and the input of differential instruction. MC 0 MCE 0 Time chart 1...
Page 170 Basic Instructions Precautions during programming A second MC−MCE instruction pair can be entered (nested) between an initial MC−MCE instruction pair. (There is no limit to the number of nestings.) MC 0 MC 1 MC 2 MCE 2 MCE 1 MCE 0 The program cannot be executed if: If either MC or MCE is missing The order of the MC and MCE instructions is reversed.
Page 171 Basic Instructions Jump Label Outline Skips to the LBL instruction with the same number as the JP instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Label number (LBL 1 ) Explanation of example When the execution condition X1 turns on, the program skips from JP1 to LBL1. Program X1: on Program...
Page 172 Basic Instructions You must be careful when using one of the instructions below, which are executed by detecting the rise of a execution condition such as the differential instruction. − DF (leading edge differential) − Count input with CT (counter) −...
Page 173 Basic Instructions Differential instruction operation between JP and LBL instructions If a differential instruction is used in the area between a JP and LBL instruction, be aware that the output will differ as shown below depending on the execution condition of the JP and the input timing of differential instruction.
Page 174 Basic Instructions LOOP Loop Label Outline Skips to the LBL instruction that has the same number as the LOOP instruction and executes what follows, repeatedly, until the data of a specified operand becomes “0”. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (MV)
Page 175 Basic Instructions Description When the execution condition (trigger) turns on, 1 is subtracted from the contents of S and if the result is other than 0, the program jumps to the label (LBL instruction) that has the same number as the specified number. The program then continues with the instructions starting from the address of the label that is the loop destination.
Page 176 Basic Instructions TM, CT, and SR instruction operation between the LOOP and LBL instructions When the LBL instruction is located after the LOOP instruction: − TM instruction: The TM instruction is not executed. LOOP 1, DT 0 If it is not executed once during a single scan, the correct time cannot be guaranteed.
Page 177 Basic Instructions Precautions during programming When the label is written in an address before the LOOP instruction, be careful of the following points. Be sure to have the instruction that sets the number of loop cycles before the area between the LBL and LOOP instructions.
Page 178 Basic Instructions Break Outline Stops execution in TEST/RUN mode. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (BRK) Description The BRK instruction is effective only in the TEST/RUN mode. In the normal RUN condition, this instruction is not executed. In the TEST/RUN mode, program execution is temporarily stopped with the address containing this BRK instruction.
Page 179 Basic Instructions 4. When X0 is in the on state, the BRK instruction is executed and program execution stops. 5. Press the “F3” key while holding down the “Shift” key in the MONITOR & TEST RUN window of the programming tool software to continue the program execution. If a BRK instruction is executed, program execution stops.
Page 180 Basic Instructions Outline Indicates the end of the ordinary program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( ED ) Description Indicates the end of the ordinary program. Program area Address Ordinary program ( ED ) Subroutine program Interrupt program Program areas are divided into an ordinary program area (main program) and “subroutine”...
Page 181 Basic Instructions CNDE Conditional end Outline Ends one scan of the program when the execution condition (trigger) turns on. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Execution condition (Trigger) ( CNDE ) CNDE Description The CNDE instruction enables you to end one scan of the program. When the execution condition (trigger) turns on, the program finishes and the input, output, and other such operations are performed.
Page 182 Basic Instructions Program execution when the CNDE instruction is executed (when X3 turns on). CNDE This part of the program is not executed when the CNDE instruction is executed. Program execution during normal scanning. 2 − 72 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 183 Basic Instructions EJECT Eject Outline Adds page break for use when printing. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( EJECT ) EJECT Explanation of example Insert the EJECT instruction in the address where you want the page to break when printing out the program you created.
Page 184 Basic Instructions 2 − 74 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 185 Basic Instructions SSTP Start step NSTL Next step (scan execution type) NSTP Next step (pulse execution type) CSTP Clear step STPE Step end Outline SSTP: Indicates the start of a step ladder process. NSTL: Opens a step ladder process. NSTL is executed every scan if its trigger is on. NSTP: Opens a step ladder process.
Page 186 Basic Instructions Description When the NSTL instruction or the NSTP instruction is executed, the process starting with the SSTP instruction of the specified number is started and executed. In a step ladder program, a process is identified as being from one SSTP instruction to the next SSTP or STPE instruction.
Page 187 Basic Instructions Syntax of step ladder instruction SSTP (start step) instruction: This instruction indicates the start of a process n. SSTP 1 Program Process 1 SSTP 2 Program Process 2 SSTP 5 Program In a step ladder program, a process n is identified as being from one SSTPn instruction to the next SSTP or STPE instruction.
Page 188 Basic Instructions NSTL (Next step, scan execution type) instruction: NSTP (Next step, differential (pulse) execution type) instruction: When an NSTPn or NSTLn instruction is executed, the process with the same process number “n” as the NSTP or NSTL instruction is opened. The execution condition (trigger) for the next step instruction means the execution condition (trigger) to start the process.
Page 189 Basic Instructions CSTP (clear step) instruction: When a CSTP instruction is executed, the process “n” with the same process number “n” is cleared. This instruction can be used to clear the final process or to clear the processes when the parallel branch merge control is executed.
Page 190 Basic Instructions When you need to clear an entire processes in step ladder program, use the master control (MC and MCE) instructions as shown below. Example: All processes are cleared when X0 becomes on. SSTP 1 Step SSTP 2 Master control ladder instructions area...
Page 191 Basic Instructions The execution state (start/stop) for processes are stored in special data registers: Type Special data register FP0 C10, C14, C16, C32/ DT9060 to DT9067 FP−e FP0 T32/FP0R DT90060 to DT90067 FPΣ/FP−X/FP2/FP2SH/ DT90060 to DT90122 FP10SH Example: The start−up conditions for processes No. 16 through No. 31 12 11 Bit position 28 27...
Page 192 Basic Instructions You must be careful when using one of the instructions below, which are executed by detecting the leading edge of execution condition (trigger) such as the differential instruction. − DF (leading edge differential) − Count input of CT (counter) −...
Page 193 Basic Instructions Selection branch control of a process This program selects and switches to the next process according to the actions and results of a particular process. Each process loops until its work is completed. Program two or more NSTL instructions to trigger the next process in a process. Depending on the execution conditions, the next process is selected, triggered and program execution is transferred.
Page 194 Basic Instructions Parallel branch merge control of a process This program triggers multiple processes simultaneously. After each of the branch processes has completed its work, they merge again before transferring execution to the next process. Program multiple NSTL instructions for one trigger in a process. To merge processes, include a flag indicating the state of the other processes in the transfer condition for the next process.
Page 195 Basic Instructions SCLR Clear multiple processes Outline Reset multiple processes specified by n1 and n2. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction NSTL NSTL SSTP SSTP NSTL NSTL NSTL NSTL NSTL NSTL SSTP SSTP SCLR SCLR K1, K3 STPE STPE Explanation of example...
Page 196 Basic Instructions CALL Subroutine call Subroutine entry Subroutine return Outline CALL: Executes the specified subroutine program. SUB: Indicates the start of the subroutine program. RET: Indicates the end of the subroutine program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (CALL CALL...
Page 197 Basic Instructions Nesting of subroutines is possible until the 5th nesting. SUB 0 (Stage 2) CALL1 SUB 1 (Stage 3) CALL2 SUB 2 (Stage 4) CALL3 SUB 3 (Stage 5) CALL4 SUB 4 Called up from inside of the subroutine. 5th nesting example Flag conditions ・Error flag (R9007):...
Page 198 Basic Instructions For the FP2/FP2SH/FP10SH, subroutine programs may be constructed with multiple entrances and only one exit. SUB 11 CALL11 SUB 12 SUB 13 CALL13 SUB 14 When “CALL 11” is executed, are executed. When “CALL 13” is executed, are executed. You must be careful when you use, in a subroutine, one of the instructions below that is executed by detecting the leading of execution condition (trigger) such as the differential instruction.
Page 199 Basic Instructions FCAL Output off type subroutine call Outline Executes the specified subroutine. When returning to the main program, all outputs in the subroutine program are set to off. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction FCAL FCAL Subroutine program number Description Operation and syntax are the same as normal subroutine call instructions.
Page 200 Basic Instructions Precautions during programming Like a CALL instruction, up to five nesting levels are possible. However, it will not be possible to use certain MC numbers depending on the number of nesting levels as shown below. Calls from other than subroutines MC255 MC255 to 254 MC255 to 253...
Page 201 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability Interrupt FP0/FP0R/FP−e/ IRET FPΣ/FP−X Interrupt return Outline INT: Indicates the start of the interrupt program. IRET: Indicates the end of the interrupt program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (INT Interrupt program number (IRET IRET Description...
Page 202 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Syntax of interrupt program An interrupt program n is the program between the INTn instruction and the IRET instruction. The interrupt program must always be placed after the ED instruction. The number of the interrupt program is decided by the type of the interrupt. Interrupt Interrupt input Program No.
Page 203 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Before inputting an interrupt program Declare the contact point to be used as the interrupt input (trigger). Select the contact point to be used as the interrupt input (trigger) and indicate it at system register 403. Notes If the high−speed counter/pulse catch is set, that contact cannot be used as the interrupt input (trigger).
Page 204 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X When another interrupt program is being executed, an interrupt will occur after the current program is completed. Execution Main program Execution INT1 program Execution INT2 program INT2 input Precautions during programming for all types If either the INT instruction or IRET instruction is missing, a syntax error will result. When an interrupt is issued, the operation memory corresponding to the interrupt input contact does not undergo I/O refreshing.
Page 205 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Control when more than one interrupt occurs simultaneously. When more than one interrupt occurs simultaneously, the interrupt program with the smaller number is executed first. The other interrupt programs are then placed in the execution waiting state. After the first interrupt program is completed, the other programs will be executed in order from the smallest number to the greatest.
Page 206 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Interrupt program execution waiting state and clearing When multiple interrupt programs occur simultaneously or new interrupt programs occur during the execution of another interrupt program, the interrupt programs of lower preference are placed in the execution waiting state. They are then executed in order of preference when the other interrupt programs are completed.
Page 207 Basic Instructions FP2/FP2SH/FP10SH Availability Interrupt FP2/FP2SH/FP10SH IRET Interrupt return Outline INT: Indicates the start of the interrupt program. IRET: Indicates the end of the interrupt program. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (INT Interrupt program number (IRET IRET Description When an interrupt is input, the interrupt program of the number specified is executed starting from the INT...
Page 208 Basic Instructions FP2/FP2SH/FP10SH Interrupt program execution There are three types of interrupt. Interrupts from a interrupt unit (corresponding to INT0 to INT15) Interrupts are issued in response to the rise or fall of the interrupt unit input (whether rising or falling is specified on the unit side).
Page 209 Basic Instructions FP2/FP2SH/FP10SH Precautions during programming for all types If either the INT instruction or IRET instruction is missing, a syntax error will result. When an interrupt is issued, the operation memory corresponding to the interrupt input contact does not undergo I/O refreshing.
Page 210 Basic Instructions FP2/FP2SH/FP10SH Control when more than one interrupt occurs simultaneously. When more than one interrupt occurs simultaneously, the interrupt program with the smaller number is executed first. The other interrupt programs are then placed in the execution waiting state. After the first interrupt program is completed, the other programs will be executed in order from the smallest number to the greatest.
Page 211 Basic Instructions FP2/FP2SH/FP10SH Interrupt program execution waiting state and clearing When multiple interrupt programs occur simultaneously or new interrupt programs occur during the execution of another interrupt program, the interrupt programs of lower preference are placed in the execution waiting state. They are then executed in order of preference when the other interrupt programs are completed.
Page 212 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability ICTL FP0/FP−e/FPΣ/FP−X/ Interrupt control FP0R Outline Performs the interrupt enable or disable and the interrupt clear. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( DF ) ICTL, H 0, H 1 ICTL 16-bit equivalent constant or 16-bit area for interrupt control data setting 16-bit equivalent constant or 16-bit area for interrupt condition setting Operands Index...
Page 213 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Precaution if rewriting during a RUN operation (for FP0/FP0R/FP−e/FPΣ) If rewriting is done during a RUN operation while the interrupt function is being used, execution of the interrupt function is inhibited. The ICTL instruction has to be used once again to enable the interrupt program to be executed.
Page 214 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Specifying control data S1: Specifying the control functions and interrupt types Bit position 12 11 Interrupt type selection H00: INT 0 to INT 7 H02: INT 24 (10ms units) H03: INT 24 (0.5ms units) Selection of control function H00: Interrupt “enabled/disabled”...
Page 215 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X S2: Specifying the control of interrupts Enabling or disabling interrupt programs (when S1 = H0 or S1 = H1). Set the control data in the bit corresponding to the number of the interrupt program that you want to control. Set the bit corresponding to the number of the program you want to enable to “1.”...
Page 216 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X Example of enabling the execution of interrupt programs Example: ICTL, H0, H21 S1: H0000 Specifies enabling or disabling of interrupt programs that correspond to interrupts at specified input contact or to target value match interrupts. S2: H0021 Enable INT0 and INT5 (set bits 0 and 5 to “1”) and disable all others.
Page 217 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X ICTL instruction Execution Main program Execution Execution INT0 program INT5 program Execution INT0 input INT5 input Condition Disabled Enabled How to start the interrupt program when executing the high−speed counter match ON/match OFF instruction. Set the counter by the system register. (It is not necessary to set the external interrupt.) Describe the interrupt program on the program.
Page 218 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X S2: HFE Clears interrupt INT0 (bit 0 is “0”) and does not clear the other interrupts. For the relationship between the set value and the interrupt input contact, refer to page 2 − 106. Even though the INT0 interrupt input occurred, when the interrupt program is disabled, the ICTL instruction can still be used to clear the INT0 interrupt.
Page 219 Basic Instructions FP0/FP0R/FP−e/FPΣ/FP−X To stop the periodical interrupt program, execute the following program. ICTL, H2, K0 2 − 109 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 220 Basic Instructions FP2/FP2SH/FP10SH Availability ICTL Interrupt control FP2/FP2SH/FP10SH Outline Performs the interrupt enable or disable and the interrupt clear. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction ( DF ) ICTL, H 0, H 1 ICTL 16-bit equivalent constant or 16-bit area for interrupt control data setting 16-bit equivalent constant or 16-bit area for interrupt condition setting Operands Index...
Page 221 Basic Instructions FP2/FP2SH/FP10SH Input examples Example 1: Setting a periodical interrupt every 10ms from the start of operations R9013 Executes INT24 every 10ms ICTL, H2, K1 The R9013 (initial pulse relay) turns on only for the first scan after operations begin. Example 2: Enable INT0 through INT3 when X30 rises.
Page 222 Basic Instructions FP2/FP2SH/FP10SH If execution has been specified as enabled or disabled for INT0 to INT15, [S1] = H0. If an interrupt clear has been specified for INT0 to INT15, [S1] = H100. If execution has been specified as enabled or disabled for INT16 to INT23, [S1] = H1. If an interrupt clear has been specified for INT16 to INT23, [S1] = H101.
Page 223 Basic Instructions FP2/FP2SH/FP10SH Specifying periodical interrupt programs (when S1 = H3 or S1=H5) for FP0/FP2/FP2SH/FP10SH only Specify the setting with decimal number. The time interval = value of S2 × 0.5 (ms). Bit position 12 11 K0 to K3000 Time interval setting: K1 to K3000 (0.5ms to 1.5s) INT24 disabled: K0 Note For the difference in the operation of H3 and H5, refer to...
Page 224 Basic Instructions FP2/FP2SH/FP10SH Example of enabling the execution of interrupt programs Example: ICTL, H0, H101 [S1]: H0000 This specifies whether execution of the interrupt program corresponding to the interrupt from the interrupt unit (INT0 to INT15) is enabled or disabled. [S2]: H0101 Enable INT0 and INT8 (set bits 0 and 8 to “1”) and disable all others.
Page 225 Basic Instructions FP2/FP2SH/FP10SH When this ICTL instruction is executed, interrupt programs INT0 and INT8 will be executed when their corresponding interrupt inputs occur. ICTL instruction Execution Main program Execution Execution INT0 program INT8 program Execution INT0 input INT8 input Condition Disabled Enabled 2 −...
Page 226 Basic Instructions FP2/FP2SH/FP10SH Example for clearing interrupt programs Example: ICTL, H100, HFFFE [S1]: H0100 Clears interrupts from the interrupt unit (INT 0 to INT15). [S2]: HFFFE Clears interrupt INT0 (bit 0 is “0”) and does not clear the other interrupts. For the relationship between the set value and the interrupt unit, refer to page 2 −...
Page 227 Basic Instructions FP2/FP2SH/FP10SH Example 1 for setting periodical interrupt Example: ICTL, H2, K1500 [S1]: H0002 Specifies periodical interrupt (units: 10ms) [S2]: K1500 Specifies the time interval for the periodical interrupt. With K1500, the time interval is K1500 x 10ms = 15000ms (15s) After this ICTL instruction is executed, the periodical interrupt will occur every 15 seconds.
Page 228 Basic Instructions FP2/FP2SH/FP10SH Example 2 for setting periodical interrupt When H4 or H5 is designated, the periodical interrupt occurs at the specified interval regardless of interrupt processing time. Compatible−timer: (kind= H02,H03) [S2] [S2] After the periodical interrupt program completed, the next interrupt timing is counted.
Page 229 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Communication conditions setting FPΣ/FP−X/FP0R Outline This changes the communication conditions for the COM port or Tool port based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1...
Page 230 Basic Instructions FPΣ/FP−X/FP0R Keyword setting 1) Communication format (Shared by the Tool, COM. 1 and COM. 2 ports) SYS1, M TOOL,B7 PN S1 Port used TOOL: Tool port COM1: COM. 1 port COM2: COM. 2 port Character bit B7: 7bits B8: 8bits Parity PN: None...
Page 231 Basic Instructions FPΣ/FP−X/FP0R 4) Header and Terminator (Shared by the TOOL, the COM. 1 and COM. 2 ports) SYS1, M COM1,STX Port used TOOL: Tool port (FPΣ 32k/FP−X/FP0R) COM1: COM. 1 port COM2: COM. 2 port Header STX: STX NOSTX: STX not exist Terminator ETX: ETX CR: CR...
Page 232 Basic Instructions FPΣ/FP−X/FP0R Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − Any character other than a keyword is specified − There is no comma between No. 1 and No. 2 keywords −...
Page 233 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Password setting FPΣ/FP−X/FP0R Outline This changes the password specified by the controller, based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1 SYS1, PASS,ABCD PASS,ABCD No.
Page 234 Basic Instructions FPΣ/FP−X/FP0R Keyword setting For the 4−digit password SYS1, M PASS,ABCD PASS : Fixed Password (Example: To set the password to “ABCD”) For the 8−digit password (It is available for FPΣ 32k/FP−X/FP0R.) SYS1, M PAS, abcdefgh : Fixed Password (Example: When “abcdefgh”...
Page 235 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 Interrupt setting FPΣ/FP−X/FP0R Outline This sets the interrupt input based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger SYS1 SYS1, M INT1,UP INT1,UP No. 1 No.
Page 236 Basic Instructions FPΣ/FP−X/FP0R Precautions during programming Executing this instruction does not rewrite the contents of the system ROM in the control unit. As a result, turning the power supply off and then on again rewrites the contents of the system registers specified by the tool software.
Page 237 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 PLC link time setting FPΣ/FP−X/FP0R Outline This sets the system setting time when a PLC link is used, based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction 90141...
Page 238 Basic Instructions FPΣ/FP−X/FP0R 2) Error detection time for transmission assurance relay SYS1, M PCLK1T1,100 PCLK1T1: Fixed Specified range: 100 to 6400 (100ms to 6400ms) Precautions during programming The program should be placed at the beginning of all PLCs being linked, and the same values specified. This instruction should be specified in order to set special internal relay R9014 as the differential execution condition.
Page 239 Basic Instructions FPΣ/FP−X/FP0R Availability FPΣ 32k SYS1 Change high−speed counter FP−X Ver 1.10 or more operation mode FP0R Outline This changes the operation mode of the high−speed counter based on the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address...
Page 240 Basic Instructions FPΣ/FP−X/FP0R Precautions during programming If the system register is not set to the addition input or subtraction input for this instruction, an operation error occurs. Set the system register to the addition or subtraction input in advance. When the addition/subtraction input setting is specified even if the setting has been already done, an operation error does not occur.
Page 241 Basic Instructions FPΣ/FP−X/FP0R Availability SYS1 MEWTOCOL−COM response control FPΣ/FP−X/FP0R Outline This specifies the response waiting time based on the MEWTOCOL−COM of the COM port or Tool port, in response to the contents specified by the character constant. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address...
Page 242 Basic Instructions FPΣ/FP−X/FP0R Keyword setting SYS1, M TOOL,WAITn Port used TOOL: Tool port COM1: COM. 1 port COM2: COM. 2 port Response time WAIT0 to WAIT999 (n: 0 to 999) If the communication mode or the MOD BUS RTV mode has been set to the computer link mode, the set time is the scan time x n (n: 0 to 999).
Page 243 Basic Instructions FPΣ/FP−X/FP0R Availability Change system registers SYS2 (No. 40 to No. 47, No. 50 to No. 57) FPΣ/FP−X/FP0R Outline This changes the settings entered for the system registers of the PLC link function, in accordance with the specified data. Program example Boolean Ladder Diagram...
Page 244 Basic Instructions FPΣ/FP−X/FP0R System registers Name Setting value and range Range of link relays used 0 to 64 words Range of link data registers used 0 to 128 words Starting number for link relay 0 to 63 transmission Link relay transmission size 0 to 64 words Starting number for link data register 0 to 127...
Page 245 Basic Instructions FPΣ/FP−X/FP0R Precaution during programming Executing this instruction does not rewrite the contents of the system ROM in the control unit. As a result, turning the power supply off and then on again rewrites the contents of the system registers specified by the tool software.
Page 246 Basic Instructions ST = 16−bit data comparison: Start equal ST <> 16−bit data comparison: Start equal not ST > 16−bit data comparison: Start larger ST >= 16−bit data comparison: Start equal or larger ST < 16−bit data comparison: Start smaller ST <= 16−bit data comparison: Start equal or smaller...
Page 247 Basic Instructions Explanation of example Compares the contents of data register DT0 with the constant K50 and K60. If DT0 = K50, the external output relay Y30 goes on and if DT0 K60, the external output relay Y31 turns on. Description Compares the word data specified by S1 with the word data specified by S2 according to the comparison condition.
Page 248 Basic Instructions STD = 32−bit data comparison: Start equal STD <> 32−bit data comparison: Start equal not STD > 32−bit data comparison: Start larger STD >= 32−bit data comparison: Start equal or larger STD < 32−bit data comparison: Start smaller STD <= 32−bit data comparison: Start equal or smaller...
Page 249 Basic Instructions Explanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100). If (DT1, DT0) = (DT101, DT100), the external output relay Y30 goes on and if (DT1, DT0) > (DT101, DT100), the external output relay Y31 goes on. Description Compares the double word data specified by S1 and S1+1 with the double word data specified by S2 and S2+1 according to the comparison condition.
Page 250 Basic Instructions STF = Floating point real number data comparison: Start equal STF <> Floating point real number data comparison: Start equal not STF > Floating point real number data comparison: Start larger STF >= Floating point real number data comparison: Start equal or larger Availability STF <...
Page 251 Basic Instructions Explanation of example Compares the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101). If (DT0, DT1) = (DT100, DT101), the external output relay Y30 goes on and if (DT0, DT1) > (DT100, DT101), the external output relay Y31 goes on.
Page 252 Basic Instructions AN = 16−bit data comparison: AND equal AN <> 16−bit data comparison: AND equal not AN > 16−bit data comparison: AND larger AN >= 16−bit data comparison: AND equal or larger AN < 16−bit data comparison: AND smaller AN <= 16−bit data comparison: AND equal or smaller...
Page 253 Basic Instructions Explanation of example Compares the contents of data register DT0 with the constant K60 when X0 turns on. If DT0 K60 in the X0 on state, external output relay Y30 goes on. If DT0 < K60 or if X0 is in the off state, external output relay Y30 goes off.
Page 254 Basic Instructions AND = 32−bit data comparison: AND equal AND <> 32−bit data comparison: AND equal not AND > 32−bit data comparison: AND larger AND >= 32−bit data comparison: AND equal or larger AND < 32−bit data comparison: AND smaller AND <= 32−bit data comparison: AND equal or smaller...
Page 255 Basic Instructions Explanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100) when X0 turns on. If (DT1, DT0) (DT101, DT100) in the X0 on state, the external output relay Y30 goes on. If (DT1, DT0) <...
Page 256 Basic Instructions ANF = Floating point real number data comparison: AND equal ANF <> Floating point real number data comparison: AND equal not ANF > Floating point real number data comparison: AND larger ANF >= Floating point real number data comparison: AND equal or larger Availability ANF <...
Page 257 Basic Instructions Explanation of example Compares the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101) when X0 turns on. If (DT0, DT1) (DT100, DT101) in the X0 on state, the external output relay Y30 goes on.
Page 258 Basic Instructions OR = 16−bit data comparison: OR equal OR <> 16−bit data comparison: OR equal not OR > 16−bit data comparison: OR larger OR >= 16−bit data comparison: OR equal or larger OR < 16−bit data comparison: OR smaller OR <= 16−bit data comparison: OR equal or smaller...
Page 259 Basic Instructions Explanation of example Y30 goes on when X0 is in the on state, or when DT0 K60. If DT0 < K60 and if X0 is in the off state, then Y30 goes off. Description Compares the word data specified by S1 with the word data specified by S2 according to the comparison condition.
Page 260 Basic Instructions ORD = 32−bit data comparison: OR equal ORD <> 32−bit data comparison: OR equal not ORD > 32−bit data comparison: OR larger ORD >= 32−bit data comparison: OR equal or larger ORD < 32−bit data comparison: OR smaller ORD <= 32−bit data comparison: OR equal or smaller...
Page 261 Basic Instructions Eplanation of example Compares the contents of data registers (DT1, DT0) with the data registers (DT101, DT100). When X0 turns on or if (DT1, DT0) (DT101, DT100), the external output relay Y30 goes on. If (DT1, DT0) < (DT101, DT100) and if X0 is in the off state, the external output relay Y30 goes off. Description Compares the double word data specified by S1 and S1+1 with the double word data specified by S2 and S2+1 according to the comparison condition.
Page 262 Basic Instructions ORF = Floating point real number data comparison: OR equal ORF <> Floating point real number data comparison: OR equal not ORF > Floating point real number data comparison: OR larger ORF >= Floating point real number data comparison: OR equal or larger Availability ORF <...
Page 263 Basic Instructions Eplanation of example When X0 turns on or if (DT0, DT1) (DT100, DT101) by comparing the real number value of data registers (DT0, DT1) with the real number value of data registers (DT100, DT101), the external output relay Y30 goes on.
Page 264 Basic Instructions 2 − 154 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 265: Chapter 3 High−Level Instructions
Chapter 3 High−level Instructions Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 266 High−level Instructions 3 - 2 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 267: Composition Of High-Level Instructions
Composition of High-level Instructions Composition of High-level Instructions 3.1.1 Composition Each high-level instruction is composed of a high-level instruction number, boolean and operands. Example: F0 (MV) instruction The K0 (S) is copied to DT0 (D) Execution condition Operand (Trigger) Address F0 MV , K0 DT 0 Boolean...
Page 268: High-Level Instruction Numbers And Program Input
High−level Instructions 3.1.2 High-level Instruction Numbers and Program Input High-level instruction numbers are assigned to high-level instructions. For example, the number assigned to the MV instruction (16-bit data transfer instruction) is 0 (F0 or P0). A high−level instruction is entered by entering its high-level instruction number. A high−level instruction with the prefix “F”...
Page 269: High-Level Instruction And Execution Condition (Trigger)
Composition of High-level Instructions 3.1.3 High-level Instruction and Execution Condition (Trigger) A high-level instruction is always used in a pair with its execution condition (trigger). When the operation result of the relay sequence circuit specified as the execution condition (trigger) is on, the high-level instruction is executed. Example: When the execution condition (trigger) X0 is on, the F0 (MV) instruction is executed and K0 is transferred to DT0.
Page 270: F" And "P" Type High-Level Instructions
High−level Instructions Example 2: The execution condition (trigger) is programmed once using the PSHS, RDS and POPS instructions. PSHS F0 MV, WR 0 , DT 10 F0 MV, LD 1 , DT 11 P115 PFIFT, DT 10 , DT 11 POPS 3.1.4 “F”...
Page 271 Composition of High-level Instructions When you use the “P” type instruction with one of the following instructions that changes the order of the execution of instructions, be aware that the operation of the instructions will differ depending on the timing of their execution and their execution conditions (triggers).
Page 272 High−level Instructions (MV) 16-bit data move (PMV) Outline Copies 16-bit data to the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P0 (PMV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV) F0 MV , DT 10 , DT 20 16-bit equivalent constant or 16-bit area (source)
Page 273 High−level Instructions Application example Example 1: Transfer K30 to timer set value area SV0 when R1 turns on. F0 MV, K 30, SV 0 Example 2: Transfer the timer elapsed value EV0 to data register DT0 when R2 turns on. F0 MV, EV 0, DT 0 Flag conditions ・Error flag (R9007):...
Page 274 High−level Instructions (DMV) 32-bit data move (PDMV) Outline Copies 32-bit data to the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P1 (PDMV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger 1 (DMV) F1 DMV , DT 10 , DT20 32-bit equivalent constant or lower 16-bit area of 32-bit data (source) Lower 16-bit area for 32-bit area (destination)
Page 275 High−level Instructions Description The 32-bit data or 32-bit equivalent constant specified by S is copied to the 32-bit area specified by D. When processing 32-bit data, the higher 16-bit areas (S+1, D+1) are automatically determined once the lower 16-bit areas (S, D) are specified. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 276 High−level Instructions (MV/) 16-bit data invert and move (PMV/) Outline Inverts 16-bit data and transfers it to the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P2 (PMV/)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 277 High−level Instructions Description The 16-bit data or 16-bit equivalent constant specified by S is inverted and transferred to the 16-bit area specified by D. Bit position · · · · · · · · · Binary data 0 0 0 0 1 0 1 1 0 Hexadecima...
Page 278 High−level Instructions (DMV/) 32-bit data invert and move (PDMV/) Outline Inverts 32-bit data and transfers it to the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P3 (PDMV/)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 279 High−level Instructions Explanation of example The contents of data registers DT12 and DT11 are inverted and transferred to data registers DT21 and DT20 when trigger R0 turns on. DT10 DT20 H 25AC H 1111 DT11 DT21 H FFFD H FFFF DT12 DT22 R0: on...
Page 280 High−level Instructions (GETS) Reading of head word No. of the specified slot. (PGETS) Outline The head word No. of the specified slot is read. This function is available from FP2/FP2SH Ver. 1.50 or later. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 281 High−level Instructions (BTM) Bit data move (PBTM) Outline Copies bit data of one 16-bit area to the specified bit of another 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P5 (PBTM)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 282 High−level Instructions Explanation of example The data at bit position 4 in data register DT20 is copied to bit position 12 in data register DT10 when trigger R0 turns on. Source [S] n : H C 0 4 Bit position ·...
Page 283 High−level Instructions Transferring multiple bits [this can only be executed with FP0R, FPΣ, FP−X, FP2 (Ver. 1.03 and subsequent versions), FP2SH, and FP10SH] With the FP2, FP2SH and FP10SH, if the number of bits to be transferred is specified for n, the specified number of bits is transferred in sequential order, starting from the position specified by S, to destination, starting from the position specified by D.
Page 284 High−level Instructions If “0” is specified as the number of bits to be transferred, the specified one bit is transferred. If the specified range extends beyond the area of S, the contents of the part extending beyond the area are transferred as “0”.
Page 285 High−level Instructions (DGT) Hexadecimal digit data move (PDGT) Outline Copies hexadecimal digits at one 16-bit area to the specified digit position in another 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P6 (PDGT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 286 High−level Instructions Description The hexadecimal digits in the 16-bit data or in the 16-bit equivalent constant specified by S are copied to the 16-bit area specified by D, as specified by n. Digits Digits are units of 4 bits used when handling data. With this instruction, 16−bit data is separated into four digits.
Page 287 High−level Instructions Examples of hexadecimal digit copy The following patterns of digit transfer are possible based on the specification of n. (1) When hexadecimal digit 1 of the source is copied to hexadecimal digit 1 of the destination: digit Specify n: H 1 0 1 digit (2) When hexadecimal digit 3 of the source is copied to hexadecimal digit 0 of the destination: digit...
Page 288 High−level Instructions 3 − 24 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 289 High−level Instructions (MV2) Two 16-bit data move (PMV2) Outline Copies two 16-bit data to the specified 32-bit area. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P7 (PMV2)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV2) F7 MV2, DT10, DT20, DT30...
Page 290 High−level Instructions Description The two 16-bit data or two 16-bit equivalent constant specified by S1 and S2 is copied to the 32-bit area specified by D when the trigger turns on. Related instruction To copy three 16-bit data, use the F190 (MV3) instruction. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 291 High−level Instructions (DMV2) Two 32-bit data move (PDMV2) Outline Copies two 32-bit data to the specified 64-bit area. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P8 (PDMV2)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (DMV2) F8 DMV2, DT10, DT20, DT30...
Page 292 High−level Instructions Description The two 32-bit data or two 32-bit equivalent constant specified by S1 and S2 is copied to the 64-bit area (D+3, D+2, D+1 and D) specified by D when the trigger turns on. Related instruction To copy three 32-bit data, use the F191 (DMV3) instruction. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 293 High−level Instructions (BKMV) Block move (PBKMV) Outline Copies block data to the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 10 (BKMV) F10 BKMV , DT 0 , DT 3 , DT 10 Starting 16-bit area (source) Ending 16-bit area (source) Starting 16-bit area (destination)
Page 294 High−level Instructions Explanation of example The data of data register “DT0 to DT3” is copied to the data registers “DT10 to DT13” when trigger R0 turns on. [S1] DT0 DT10 Source DT11 DT12 [S2] DT3 DT13 R0: on “F10 (BKMV)” execution [S1] DT0 DT10 DT11...
Page 295 High−level Instructions (COPY) Block copy (PCOPY) Outline Copies the specified 16-bit data to a block with one or more 16-bit areas. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 11...
Page 296 High−level Instructions Explanation of example The contents of data register DT0 are copied to the block ranging from data register DT10 to DT14 when trigger R0 turns on. [D1] DT10 [S] DT1 DT11 DT12 DT13 [D2] DT14 R0: on “F11 (COPY)” execution [D1] DT10 [S] DT1...
Page 297 High−level Instructions FP0/FP−e Availability (ICRD) Data read from EEPROM FP0/FP−e Outline Reads data from the EEPROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT0 Constant for specifying the starting address of EEPROM (for source data) 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be read...
Page 298 High−level Instructions FP0/FP−e Description S2 blocks of data stored in the EEPROM starting from S1 are transferred into the data register specified by D. At this time, the transferred data is handled in units of 1 block/64 words. Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
Page 299 High−level Instructions FPΣ/FP−X/FP0R Availability (ICRD) Data read from F–ROM FPΣ/FP−X/FP0R Outline Reads data from the F–ROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT0 Constant for specifying the starting address of F–ROM (for source data) 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be read...
Page 300 High−level Instructions FPΣ/FP−X/FP0R Description S2 blocks of data stored in the F–ROM starting from S1 are transferred into the data register specified by D. At this time, the transferred data is handled in units of 1 block (2,048 words). Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
Page 301 High−level Instructions FP2SH/FP10SH FP2SH/FP10SH (ICRD) Data read from IC card Availability (PICRD) FP2SH/FP10SH Outline Reads data from the expansion memory area of the IC card. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 12 (ICRD) F12 ICRD , K 0 , K10 , DT100 Constant for specifying the starting address of IC card expansion memory (for source data)
Page 302 High−level Instructions FP2SH/FP10SH Description S2 words of data stored in the IC card expansion memory area starting from S1 are transferred into the CPU memory location specified by D. Precautions during programming The values available for S1 and S2 vary depending on the size of the IC card expansion memory area. When using an nkB IC card n x 1024 −1...
Page 303 High−level Instructions FP0/FP−e Step Availability (PICWT) Data write to EEPROM FP0 V2.0 or more/FP−e Outline Writes data to the EEPROM area. Program examplez Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger P 13 (PICWT) P13 PICWT , DT 0 , K10 , This instruction is a differential execution type (P type) of instruction, and should be specified with a “P”...
Page 304 High−level Instructions FP0/FP−e Description S2 blocks of data stored in the data register starting from S1 are transferred into the EEPROM area specified by D. At this time, the transferred data is handled in units of 1 block/64 words. Precautions during programming Values that can be specified by S1, S2 and D Type Memory area...
Page 305 High−level Instructions FPΣ/FP−X/FP0R Availability (PICWT) Data write to F–ROM FPΣ/FP−X/FP0R Outline Writes data to the F–ROM area. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger P 13 (PICWT) P13 PICWT , DT 0 , K1 , This instruction is a differential execution type (P type) of instruction, and should be specified with a “P”...
Page 306 High−level Instructions FPΣ/FP−X/FP0R Description S2 block of data stored in the data register starting from S1 is transferred into the F–ROM area specified by D. At this time, the transferred data is handled in units of 1 block (2,048 words). Precautions during programming Values that can be specified by S1, S2 and D Type...
Page 307 High−level Instructions FP2SH/FP10SH (ICWT) Availability Data write to IC card (PICWT) FP2SH/FP10SH Outline Writes data to the expansion memory area in the IC card. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 13 (ICWT) F13 ICWT , DT 100 , K10 , K100 Starting 16-bit area for storing source data 32−bit equivalent constant or lower 16−bit area of 32−bit data for specifying number of words to be write...
Page 308 High−level Instructions FP2SH/FP10SH Description S2 words of data stored in the CPU starting from S1 are transferred into the expansion memory area in the IC card specified by D. The F13 (ICWT)/P13 (PICWT) instruction can be executed only in the expansion memory area of an SRAM−type IC card.
Page 309 High−level Instructions (PGRD) Program read from IC card (PPGRD) Outline Reads a program from the IC card and executes it. Program example Boolean Non-ladder Ladder Diagram Ladder Diagram Address Instruction Trigger F 14 (PGRD) F14 PGRD , DT 100 Starting 16-bit area (max. 4 words of data) for storing file name (max. 8 letters) in the ASCII format.
Page 310 High−level Instructions Description The program for the file name stored in the area specified by S is read from the IC memory card, and is substituted for the program currently being executed. Subsequent operation is carried out based on the program which was read. Precautions when changing programs Programs are changed when the ED instruction is executed.
Page 311 High−level Instructions Specifying file names The program file name should be replaced with a character code, and written to the memory area that has S as the first address. ASCII codes can be used. No extension should be attached. A single−byte numerical value H00 is the final code. If ”H00” is written at the end of the file name (the MSB), the characters up to that point area treated as the file name.
Page 312 High−level Instructions Specifying a file name with the ASCII conversion instruction, and converting it The file name is converted to a character code using the ASCII conversion instruction “F95 (ASC)”, and is written to a specified memory area. − Programming can only be done with the programming tool software. −...
Page 313 High−level Instructions (XCH) 16-bit data exchange (PXCH) Outline Exchanges two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P15 (PXCH)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 15 (XCH) F15 XCH , DT 10 , DT 22 16-bit area to be exchanged 16-bit area to be exchanged Operands...
Page 314 High−level Instructions Explanation of example The contents of data register DT10 and data register DT22 are exchanged when trigger R0 turns on. [D1] DT10 DT20 DT11 DT21 DT12 DT22 [D2] DT13 DT23 DT14 DT24 R0: on “F15 (XCH)” execution [D1] DT10 DT20 DT11 DT21...
Page 315 High−level Instructions (DXCH) 32-bit data exchange (PDXCH) Outline Exchanges two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 16 (DXCH) F16 DXCH , DT 10 , DT22 Lower 16-bit area of 32-bit data to be exchanged Lower 16-bit area of 32-bit data to be exchanged Operands...
Page 316 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and data registers DT23 and DT22 are exchanged when trigger R0 turns on. DT20 1234 [D1] DT10 DT21 DT11 FFFD 5678 DT22 [D2] DT12 25AC 9ABC DT23 DEF1 DT13 R0: on...
Page 317 High−level Instructions (SWAP) Higher/lower byte in 16-bit data exchange (PSWAP) Outline Exchanges higher and lower order bytes of the specified 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 318 High−level Instructions Description The higher order byte (higher 8-bit) and lower order byte (lower 8-bit) of the 16-bit area specified by D are exchanged. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier exceeds the limit.
Page 319 High−level Instructions (BXCH) 16-bit blocked data exchange (PBXCH) Outline Exchanges the 16-bit blocked data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P18 (PBXCH)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (BXCH) F18 BXCH, DT10, DT13, DT31 (DF) Starting 16-bit area of block data 1 Ending 16-bit area of block data 1...
Page 320 High−level Instructions Explanation of example The data block from data register DT10 to data register DT13 and the data block (DT31 to DT34) starting from data register DT31 are exchanged when trigger R0 turns on. [D1] DT10 DT30 [D3] [D2] DT13 R0: on “F18 (BXCH)”...
Page 321 High−level Instructions (SJP) Auxiliary jump Label Outline Skips to the LBL instruction with the same number as the data area specified by the F19 (SJP) instruction. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction (SJP) F19 SJP, DT 0 Label number (LBL 20 ) 16-bit area for storing the label number [0 to 255 (256 points)]...
Page 322 High−level Instructions Description The F19 (SJP) instruction skips the program between the F19 (SJP) and the LBL with the number specified by S when the trigger turns on. Program execution continues from the next instruction after the jump destination label. Up to 256 jump destinations can be specified (the range of values in which S can be stored is from K0 to K255).
Page 323 High−level Instructions 16-bit data addition [D+S → D] (P+) Outline Adds two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P20 (P+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 20 (+ ) F20 +, DT 1 , DT 10 16-bit equivalent constant or 16-bit area (for addend)
Page 324 High−level Instructions Description The 16-bit equivalent constant or 16-bit area specified by S and the 16-bit area specified by D are added together. Augend data Addend data Trigger turns on Result Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow or underflow will result.
Page 325 High−level Instructions (D+) 32-bit data addition [(D+1, D) + (S+1, S) → (D+1, D)] (PD+) Outline Adds two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P21 (PD+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 326 High−level Instructions Explanation of example The contents (32 bits) of data registers DT11 and DT10 and the contents (32 bits) of data registers DT1 and DT0 are added together when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of...
Page 327 High−level Instructions 16-bit data addition [S1 + S2 → D] (P+) Outline Adds two 16-bit data items and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P22 (P+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 328 High−level Instructions Explanation of example The contents of data registers DT10 and DT20 are added when trigger R0 turns on. The added result is stored in data register DT30. when the decimal number 8 is in DT10 and the decimal number 4 is in DT20, as shown below. Augend [S1]: K8 Bit position ·...
Page 329 High−level Instructions (D+) 32-bit data addition [(S1+1, S1) + (S2+1, S2) → (D+1, D)] (PD+) Outline Adds two 32-bit data items and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P23 (PD+)” is not available. Program example Boolean Ladder Diagram...
Page 330 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT21 and DT20 are added when trigger R0 turns on. The added result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the...
Page 331 High−level Instructions (−) 16-bit data subtraction [D − S → D] (P−) Outline Subtracts 16-bit data from the minuend. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P25 (P−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 25...
Page 332 High−level Instructions Example 2: When the decimal number 3 is in DT20 and the decimal number 5 is in DT10. DT20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 (Subtraction) − DT10 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 DT20 K−2...
Page 333 High−level Instructions (D−) 32-bit data subtraction [(D+1, D) − (S+1, S) → (D+1, D)] (PD−) Outline Subtracts 32-bit data from the minuend. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P26 (PD−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 334 High−level Instructions Explanation of example Subtracts the contents (32 bits) of data registers DT11 and DT10 from the contents (32 bits) of data registers DT21 and DT20 when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
Page 335 High−level Instructions (−) 16-bit data subtraction [S1 − S2 → D] (P−) Outline Subtracts 16-bit data from the minuend and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P27 (P−)” is not available. Program example Boolean Ladder Diagram...
Page 336 High−level Instructions Explanation of example Subtracts the contents of data register DT20 from the contents of data register DT10 when trigger R0 turns on. The subtracted result is stored in data register DT30. Example 1: When the decimal number 16 is in DT10 and the decimal number 4 is in DT20.
Page 337 High−level Instructions (D−) 32-bit data subtraction [(S1+1, S1) − (S2+1, S2) → (D+1, D)] (PD−) Outline Subtracts 32-bit data from the minuend and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P28 (PD−)” is not available. Program example Boolean Ladder Diagram...
Page 338 High−level Instructions Explanation of example Subtracts the contents of data registers DT21 and DT20 from the contents of data registers DT11 and DT10 when trigger R0 turns on. The subtracted result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the Contents of...
Page 339 High−level Instructions 16-bit data multiplication [S1 × S2 → (D+1, D)] (P*) Outline Multiplies two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F30 *, DT 10 , DT 20, DT 30 16-bit equivalent constant or 16-bit area (for multiplicand) 16-bit equivalent constant or 16-bit area (for multiplier) Lower 16-bit area of 32-bit data (for result)
Page 340 High−level Instructions Explanation of example Multiplies the contents of data register DT10 and DT20 when trigger R0 turns on. The result is stored in data registers DT 31 and DT 30. When the decimal number 8 is in DT10 and the decimal number 2 is in DT20. Multiplicand [S1]: K8 Bit position ·...
Page 341 High−level Instructions (D*) 32-bit data multiplication [(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)] (PD*) Outline Multiplies two 32-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 342 High−level Instructions Description Multiplies the 32-bit data or 32-bit equivalent constant specified by S1 and the one specified by S2. The multiplied result is stored in D+3, D+2, D+1 and D. Multiplicand data Multiplier data Result × (S1+1, S1) (S2+1, S2) (D+3, D+2, D+1, D) The multiplied result is stored in the 64-bit area.
Page 343 High−level Instructions 16-bit data division [S1/S2 → D… (DT9015/DT90015)] (P%) Outline Divides 16-bit data by the divisor. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 32 (% ) F32 % , DT 10 , DT 20 , DT 30 16-bit equivalent constant or 16-bit area (for dividend)
Page 344 High−level Instructions Explanation of example Divides the contents of data register DT10 by decimal constant DT20 when trigger R0 turns on. The quotient is stored in data register DT30 and the remainder is stored in special data register DT9015/DT90015. When the decimal number 15 is in DT10 and the decimal number 4 is in DT20, as shown below. Dividend [S1]: K15 Bit position ·...
Page 345 High−level Instructions 32-bit data division (D%) [(S1+1, S1)/(S2+1, S2) → (D+1, D)…(DT9016, DT9015)/ (DT90016, DT90015)] (PD%) Outline Divides 32-bit data by the divisor. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P33 (PD%)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 346 High−level Instructions Explanation of example Higher 16 bits Lower 16 bits Contents of Contents of DT10 DT11 ÷ (Division) Contents of Contents of DT21 DT20 ← Quotient is stored in DT31 and DT30. To DT31 To DT30 ← The lower 16 bits of the remainder is stored in DT9015/DT90015 and the higher 16 bits of the remainder is stored in DT9016/DT90016.
Page 347 High−level Instructions (*W) 16-bit data multiplication (result in 16 bits) (P*W) Outline Multiplies two 16-bit data items and stores the result in the specified 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P34 (P*W)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 348 High−level Instructions Description Multiplies the 16-bit data or 16-bit equivalent constant specified by S1 and the 16-bit data or 16-bit equivalent constant specified by S2 when the trigger turns on. The multiplied result is stored in D (16-bit area). Multiplicand data Multiplier data Trigger turns on Result...
Page 349 High−level Instructions (+1) 16-bit data increment [D + 1 → D] (P+1) Outline Adds 1 to 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P35 (P+1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 35 (+1)
Page 350 High−level Instructions Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result. Under normal circumstances, do not allow an overflow to occur. If the operation result accidentally overflows, use of the F36 (D+1) instruction (32-bit data increment) is recommended.
Page 351 High−level Instructions (D+1) 32-bit data increment [(D + 1, D) + 1 → (D + 1, D)] (PD+1) Outline Adds 1 to 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P36 (PD+1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 352 High−level Instructions Description Adds 1 to the 32-bit data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
Page 353 High−level Instructions (−1) 16-bit data decrement [D − 1 → D] (P−1) Outline Subtracts 1 from 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 37 (−1 ) F37 −1 , DT 0 16-bit area to be decreased by 1...
Page 354 High−level Instructions Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result. Under normal circumstances, do not allow an underflow to occur. If the operation result accidentally underflows, use of the F38 (D−1) instruction (32-bit data decrement) is recommended.
Page 355 High−level Instructions (D−1) 32-bit data decrement [(D+1, D) − 1 → (D+1, D)] (PD−1) Outline Subtracts 1 from 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P38 (PD−1)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 356 High−level Instructions Description Subtracts 1 from the 32-bit data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) − (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
Page 357 High−level Instructions (D*D) 32-bit data multiplication (result in 32 bits) (PD*D) Outline Multiplies two 32-bit data items and stores the result in the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P39 (PD*D)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 358 High−level Instructions Description Multiplies the 32-bit data or 32-bit equivalent constant specified by S1 and the one specified by S2 when the trigger turns on. The multiplied result is stored in D+1 and D (32-bit area). Multiplicand data Multiplier data Trigger turns on Result (32-bit) lower 16-bit...
Page 359 High−level Instructions (B+) 4-digit BCD data addition [D + S → D] (PB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P40 (PB+)” is not available. Program example Boolean Ladder Diagram...
Page 360 High−level Instructions Explanation of example The contents of data register DT10 and data register DT1 are added together when trigger R0 turns on. When H4 (BCD)is in DT1 and H8 (BCD) is in DT10, as shown below. Augend [D]: H8 (BCD) Bit position ·...
Page 361 High−level Instructions (DB+) 8-digit BCD data addition [(D+1, D) + (S+1, S) → (D+1, D)] (PDB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P41 (PDB+)” is not available. Program example Boolean Ladder Diagram...
Page 362 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT1 and DT0 are added together when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
Page 363 High−level Instructions (B+) 4-digit BCD data addition [S1 + S2 → D] (PB+) Outline Adds two BCD data items that express 4-digit decimal numbers (4-digit BCD H codes) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P42 (PB+)”...
Page 364 High−level Instructions Explanation of example The contents of data register DT10 and data register DT20 are added to gether when trigger R0 turns on. The added result is stored in data register DT30. When H (BCD) 8 is in DT10 and H (BCD) 4 is in DT20, as shown below. Augend [S1]: H8 (BCD) Bit position ·...
Page 365 High−level Instructions (DB+) 8-digit BCD data addition [(S1+1, S1) + (S2+1, S2) → (D+1, D)] (PDB+) Outline Adds two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P43 (PDB+)”...
Page 366 High−level Instructions Explanation of example The contents of data registers DT11 and DT10 and the contents of data registers DT21 and DT20 are added together when trigger R0 turns on. The added result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the...
Page 367 High−level Instructions (B−) 4-digit BCD data subtraction [D − S → D] (PB−) Outline Subtracts one BCD data item that expresses a 4-digit decimal number (4-digit BCD H codes) from another (minuend). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P45 (PB−)”...
Page 368 High−level Instructions Description Subtracts the 4-digit BCD equivalent constant or 16-bit area for 4-digit BCD data specified by S from the 16-bit area for 4-digit BCD data specified by D. Minuend data Subtrahend data Result − Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
Page 369 High−level Instructions (DB−) 8-digit BCD data subtraction [(D+1, D) − (S+1, S) → (D+1, D)] (PDB−) Outline Subtracts one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) from another (minuend). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P46 (PDB−)”...
Page 370 High−level Instructions Explanation of example Subtracts the contents of data registers DT11 and DT10 from the contents of data registers DT21 and DT20 when trigger R0 turns on. Higher 16 bits Lower 16 bits The specified data area and the Contents of Contents of following data area are handled...
Page 371 High−level Instructions (B−) 4-digit BCD data subtraction [S1 − S2 → D] (PB−) Outline Subtracts one BCD data item that expresses a 4-digit decimal number (4-digit BCD H code) from another (minuend) and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P47 (PB−)”...
Page 372 High−level Instructions Explanation of example Subtracts the contents of data register DT20 from the contents of data register DT10 when trigger R0 turns on. The subtracted result is stored in data register DT30. When H (BCD) 16 is in DT10 and H (BCD) 4 is in DT20, as shown below. Minuend [S1]: H16 (BCD) Bit position ·...
Page 373 High−level Instructions (DB−) 8-digit BCD data subtraction [(S1+1, S1) − (S2+1, S2) → (D+1, D)] (PDB−) Outline Subtracts one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) from another (minuend) and stores the result in the specified area.
Page 374 High−level Instructions Explanation of example Subtracts the contents of data registers DT21 and DT20 from the contents of data registers DT11 and DT10 when trigger R0 turns on. The subtracted result is stored in data registers DT31 and DT30. Higher 16 bits Lower 16 bits The specified data area and the Contents of...
Page 375 High−level Instructions (B*) 4-digit BCD data multiplication [S1 × S2 → (D+1, D)] (PB*) Outline Multiplies two BCD data items that express 4-digit decimal numbers (4-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P50 (PB*)” is not available. Program example Boolean Ladder Diagram...
Page 376 High−level Instructions Explanation of example When H (BCD) 8 is in DT10 and H (BCD) 2 is in DT20, as shown below. Multiplicand [S1]: H8 (BCD) Bit position · · · · · · · · · 0 0 0 0 0 0 0 0 0 1 0 0...
Page 377 High−level Instructions 8-digit BCD data multiplication [(S1+1, S1) × (S2+1, S2) → (D+3, D+2, D+1, D)] (PDB Outline Multiplies two BCD data items that express 8-digit decimal numbers (8-digit BCD H codes). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P51 (PDB*)”...
Page 378 High−level Instructions Explanation of example 16 bits 16 bits The specified data area and the following data area are handled together as 32−bit data. Contents of Contents of DT11 DT10 16 bits 16 bits Contents of Contents of DT21 DT20 16 bits 16 bits 16 bits...
Page 379 High−level Instructions (B%) 4-digit BCD data division [S1/S2 → D… (DT9015) or (DT90015)] (PB%) Outline Divides one BCD data item that expresses a 4-digit decimal number (4-digit BCD H code) by another (divisor). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P52 (PB%)”...
Page 380 High−level Instructions Explanation of example Divides the contents of data register DT10 by the contents of data register DT20 when trigger R0 turns on. The quotient is stored in data register DT30 and the remainder is stored in special data register DT9015 (DT90015 for FP2/FP2SH/FP10SH).
Page 381 High−level Instructions 8-digit BCD data division (DB%) [(S1+1, S1)/(S2+1, S2) → (D+1, D)… (DT9016, DT9015) or (DT90016, DT90015)] (PDB%) Outline Divides one BCD data item that expresses an 8-digit decimal number (8-digit BCD H code) by another (divisor). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P53 (PDB%)”...
Page 382 High−level Instructions Explanation of example Higher 16 bits Lower 16 bits Contents of Contents of DT10 ÷ DT11 (Division) Contents of Contents of DT21 DT20 ← Quotient is stored in DT31 and DT30. To DT31 To DT30 ← The lower 16 bits of the remainder is stored in DT9015/DT90015 and the higher 16 bits of the remainder is stored in DT9016/DT90016.
Page 383 High−level Instructions (B+1) 4-digit BCD data increment [D + 1 → D] (PB+1) Outline Adds 1 to BCD data that expresses a 4-digit decimal number (4-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P55 (PB+1)” is not available. Program example Boolean Ladder Diagram...
Page 384 High−level Instructions Description Adds 1 to the 4-digit BCD data specified by D. The result is stored in D. Original data Result Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
Page 385 High−level Instructions (DB+1) 8-digit BCD data increment [(D+1, D) + 1 → (D+1, D)] (PDB+1) Outline Adds 1 to BCD data that expresses an 8-digit decimal number (8-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P56 (PDB+1)” is not available. Program example Boolean Ladder Diagram...
Page 386 High−level Instructions Description Adds 1 to the 8-digit BCD data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an overflow will result.
Page 387 High−level Instructions (B−1) 4-digit BCD data decrement [D − 1 → D] (PB−1) Outline Subtracts 1 from BCD data that expresses a 4-digit decimal number (4-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P57 (PB−1)” is not available. Program example Boolean Ladder Diagram...
Page 388 High−level Instructions Description Subtracts 1 from the 4-digit BCD data specified by D. The result is stored in D. Original data Result − Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
Page 389 High−level Instructions (DB−1) 8-digit BCD data decrement [(D+1, D) − 1 → (D+1, D)] (PDB−1) Outline Subtracts 1 from BCD data that expresses an 8-digit decimal number (8-digit BCD H code). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P58 (PDB−1)” is not available. Program example Boolean Ladder Diagram...
Page 390 High−level Instructions Description Subtracts 1 from the 8-digit BCD data specified by D. The result is stored in D+1 and D. Original data Result (D+1, D) − (D+1, D) Precautions during programming If the result of an arithmetic operation instruction does not fall within the range of values which can be handled, an underflow will result.
Page 391 High−level Instructions (CMP) 16-bit data comparison (PCMP) Outline The two specified 16−bit data are compared and the result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P60 (PCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 392 High−level Instructions Explanation of example Compares decimal constant K100 with the contents of data register DT0 when trigger R0 turns on. When DT0 > K100, R900A turns on and external output relay Y10 turns on. When DT0 = K100, R900B turns on and external output relay Y11 turns on. When DT0 <...
Page 393 High−level Instructions Precautions when using two or more comparison instructions The comparison instruction flags R900A to R900C are updated with each execution of the comparison instruction. If you use two or more comparison instructions in your program, be sure to use the flags immediately after each comparison instruction, by employing output relays or internal relays.
Page 394 High−level Instructions Precautions when comparing BCD or external data When comparing special data, such as BCD or unsigned binary (0 to FFFF), construct your program as shown in the program example below, using special internal relays R900B and R9009. Example: Compares BCD data in DT0 and DT1.
Page 395 High−level Instructions (DCMP) 32-bit data comparison (PDCMP) Outline The two specified 32−bit data are compared and the result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P61 (PDCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 396 High−level Instructions Explanation of example Compares the content (32−bit data) of data registers DT11 and DT10 with the content (32−bit data) of data registers DT1 and DT0 when trigger R0 turns on. When (DT1 and DT0) > (DT11 and DT10), R900A turns on and external output relay Y10 turns on. When (DT1 and DT0) = (DT11 and DT10), R900B turns on and external output relay Y11 turns on.
Page 397 High−level Instructions Precautions when using two or more comparison instructions The comparison instruction flags R900A to R900C are updated with each execution of the comparison instruction. If you use two or more comparison instructions in your program, be sure to use the flags immediately after each comparison instruction, by employing output relays or internal relays.
Page 398 High−level Instructions Precautions when comparing BCD or external data When comparing special data, such as BCD or unsigned binary (0 to FFFFFFFF), flags R9009, R900A, R900B, and R900C work as shown in the table below. In this case, construct your program as shown in the program example below, using special internal relays R900B and R9009.
Page 399 High−level Instructions (WIN) 16-bit data band comparison (PWIN) Outline Compares one 16-bit data item with the data band specified by two other 16-bit data items and the comparison result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P62 (PWIN)”...
Page 400 High−level Instructions Explanation of example Compares the contents of data register DT10 with the contents of data register DT20 (lower limit of the data band) and data register DT30 (upper limit of the data band) when trigger R0 turns on. Example: When K−500 is in DT20 and K500 is in DT30, as shown below.
Page 401 High−level Instructions (DWIN) 32-bit data band comparison (PDWIN) Outline Compares one 32-bit data item with the data band specified by two other 32-bit data items and the comparison result is output to the special internal relay. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P63 (PDWIN)”...
Page 402 High−level Instructions Explanation of example Compares the contents of data registers DT11 and DT10 with the contents of data registers DT21 and DT20 (lower limit of the data band) and data registers DT31 and DT30 (upper limit of the data band), when trigger R0 turns on.
Page 403 High−level Instructions (BCMP) Block data comparison (PBCMP) Outline Compares one specified data block with another in byte units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P64 (PBCMP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 64 (BCMP)
Page 404 High−level Instructions Explanation of example Compares the data block of data register DT10 (4 bytes from DT10 lower order byte) with data register DT20 (4 bytes from DT20 higher order byte) according to the comparison condition in data register DT0 when trigger R0 turns on.
Page 405 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The data specified by S1 is not BCD data. −...
Page 406 High−level Instructions 3 − 142 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 407 High−level Instructions (WAN) 16-bit data AND (PWAN) Outline Performs bit-wise AND operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level ainstruction “P65 (PWAN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 65 (WAN) F65 WAN , DT10 , DT 20, DT30...
Page 408 High−level Instructions Description Performs AND operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The AND operation result is stored in the 16-bit area specified by D. (S1) (S2) → (D) You can use this instruction to turn off certain bits of the 16-bit data. AND operation The AND operation is shown below.
Page 409 High−level Instructions (WOR) 16-bit data OR (PWOR) Outline Performs bit-wise OR operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P66 (PWOR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 66 (WOR) F66 WOR , DT10 , DT20 , DT30...
Page 410 High−level Instructions Description Performs OR operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The OR operation result is stored in the 16-bit area specified by D. (S1) (S2) → (D) You can use this instruction to turn on certain bits of the 16-bit data. OR operation The OR operation is shown below.
Page 411 High−level Instructions (XOR) 16-bit data exclusive OR (PXOR) Outline Performs bit-wise exclusive OR operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P67 (PXOR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 67...
Page 412 High−level Instructions Description Performs exclusive OR operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The exclusive OR operation result is stored in the 16-bit area specified by D. {(S1) {(S1) (S2)} (S2)} →...
Page 413 High−level Instructions (XNR) 16-bit data exclusive NOR (PXNR) Outline Performs bit-wise exclusive NOR operation on two 16-bit data items. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P68 (PXNR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 68...
Page 414 High−level Instructions Description Performs exclusive NOR operation on each bit in the 16-bit equivalent constant or 16-bit data specified by S1 and S2. The exclusive NOR operation result is stored in the 16-bit area specified by D. {(S1) {(S1) (S2)} (S2)} →...
Page 415 High−level Instructions (WUNI) 16-bit data unite (PWUNI) Outline Unites two 16-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P69 (PWUNI)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (WUNI) F69 WUNI, DT 10, D 20, DT 30, DT 40 16-bit equivalent constant or 16-bit area 16-bit equivalent constant or 16-bit area 16-bit area which stores mask data for combination or 16-bit equivalent...
Page 416 High−level Instructions Description The two groups of word data specified by S1 and S2 are combined by bit unit processing using the mask data specified by S3 and stored in the area specified by D. S3) → (D) When S3 is H0, the contents of S2 stored in the D. When S3 is HFFFF, the contents of S1 stored in the D.
Page 417 High−level Instructions (BCC) Block check code calculation (PBCC) Outline Calculates Block Check Code (BCC). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P70 (PBCC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 70 (BCC) F70 BCC , K 2 , DT 0 , K 12 , DT 6 16-bit equivalent constant or 16-bit area (specifies BCC calculation method) Starting 16-bit area to calculate BCC...
Page 418 High−level Instructions Description Creates Block Check Code (BCC) from the starting position for the calculation specified by “S1” and “S2” using the calculation method specified by “S1”, and stores the result at the position specified by “D” and “S1” according to the conversion method specified by “S1”. BCC calculation method 0: Addition 1: Subtraction...
Page 419 High−level Instructions Application example 1 In this example, the block check code of the message being sent, ”%01#RCSX0000”, is calculated and is added after the message. Transmission is done using ASCII codes. BCC is calculated as an exclusive logical OR. The message should be stored in the memory area as shown below.
Page 420 High−level Instructions How to calculate the Block Check Code (BCC) Exclusive ORing calculates the Block Check Code (BCC) with each ASCII character. ASCII HEX code Exclusive OR operation 0 0 1 0 0 1 0 Exclusive ORing ASCII BIN code ASCII HEX code 0 0 1 1 0 0 0...
Page 421 High−level Instructions Application example 2 In this example, the block check code of the message being sent, ”%01#RCSX0000”, is calculated and is added at the end of the message. Calculation method: Addition, conversion data: Binary data Calculation method: Addition, conversion data: ASCII codes Calculation method: Addition, conversion data: ASCII codes Calculation method: CRC, conversion data: Binary data 3 −...
Page 422 High−level Instructions (HEXA) Hexadecimal data → ASCII code (PHEXA) Outline Converts 16-bit data to ASCII code that expresses the equivalent hexadecimals. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P71 (PHEXA)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 423 High−level Instructions Explanation of example Converts 2 bytes of data stored in data register DT0 to ASCII codes that express the equivalent hexadecimals when trigger R0 turns on. The converted data is stored in data registers DT11 and DT10. Bit position 1211 ·...
Page 424 High−level Instructions Conversion example The following shows conversion of hexadecimal data to ASCII codes. Conversion of four bytes of data (S2 = K4) Hexadecimal data S1+1 4 bytes F71 (HEXA) instruction execution Converted result Result of S1 + 1 Result of S1 conversion conversion Conversion of three bytes of data (S2 = K3) Since “byte”...
Page 425 High−level Instructions (AHEX) ASCII code → Hexadecimal data (PAHEX) Outline Converts ASCII code that expresses hexadecimal characters to hexadecimal data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P72 (PAHEX)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 426 High−level Instructions Explanation of example Converts 4 ASCII codes stored in data registers DT0 and DT1 to hexadecimal numbers when trigger R0 turns on. The converted data is stored in data register DT40. ASCII HEX code ASCII character DT40 1211 Bit position ·...
Page 427 High−level Instructions Conversion Example The following shows conversion of ASCII codes to hexadecimal data. Conversion of eight characters (S2 = K8) ASCII code S1+3 S1+2 S1+1 8 characters (8 bytes) F72 (AHEX) instruction execution Converted result Result of S1 + 3, Result of S1 + 1, S1 S1 + 2 conversion conversion...
Page 428 High−level Instructions The converted results are stored in byte units. If an odd number of characters is being converted, “0” will be entered for bit position 0 to 3 of the final data (byte) of the converted results. Converted result ASCII code n−1 n−2...
Page 429 High−level Instructions (BCDA) BCD data → ASCII code (PBCDA) Outline Converts BCD code to ASCII code that expresses the equivalent decimals. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P73 (PBCDA)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 430 High−level Instructions Explanation of example Converts BCD code that express a 4-digit decimal number (4-digit BCD H code) stored in data register DT0 to ASCII code when trigger R0 turns on. The converted data is stored in data registers DT10 and DT11. When S2 = H2 (normal direction, 2 bytes convertion) H code DT11...
Page 431 High−level Instructions How to specify S2 S2 = H Number of bytes for BCD data H1: 1 byte (BCD code that expresses a 2-digit decimal) H2: 2 bytes (BCD code that expresses a 4-digit decimal) H3: 3 bytes (BCD code that expresses a 6-digit decimal) H4: 4 bytes (BCD code that expresses a 8-digit decimal) Direction of converted data H0: Normal direction...
Page 432 High−level Instructions Conversion Example The following shows conversion from BCD data to ASCII codes. Normal direction convertion of 4 bytes (S2 = H0004) BCD data S1+1 BCD H code 4 bytes F73 (BCDA) instruction execution Converted result ASCII HEX code ASCII character Result of S1 + 1...
Page 433 High−level Instructions (ABCD) ASCII code → BCD data (PABCD) Outline Converts ASCII code that expresses decimal characters to BCD code. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P74 (PABCD)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 434 High−level Instructions Explanation of example Converts ASCII codes stored in data registers DT1 and DT0 to BCD data when trigger R0 turns on. The converted data is stored in data register DT40. When S2 = H4 (normal direction, 4 bytes) ASCII HEX code ASCII...
Page 435 High−level Instructions How to specify S2 S2 = H □ 0 0 □ Number of bytes for ASCII character H1: 1 byte (1 ASCII character) H2: 2 bytes (2 ASCII characters) H3: 3 bytes (3 ASCII characters) H4: 4 bytes (4 ASCII characters) H5: 5 bytes (5 ASCII characters) H6: 6 bytes (6 ASCII characters) H7: 7 bytes (7 ASCII characters)
Page 436 High−level Instructions 7 ASCII characters (S2=H1007) ASCII code S1+3 S1+2 S1+1 ASCII HEX code ASCII character 7 ASCII characters (7 bytes) This position is F74 (ABCD) instruction execution filled with “0”. Converted result BCD H code BCD character to express ASCII HEX code ASCII HEX BCD character code...
Page 437 High−level Instructions (BINA) 16-bit binary data → ASCII code (PBINA) Outline Converts 16-bit data to ASCII code that expresses the equivalent decimals. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P75 (PBINA)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 438 High−level Instructions Explanation of example Converts the 16-bit data stored in data register DT0 to ASCII codes that express the equivalent decimals when trigger R0 turns on. The converted data is stored in data registers DT52 to DT50. Source Bit position 1211 ·...
Page 439 High−level Instructions Conversion Example The following shows conversion from 16−bit decimal data to ASCII codes. When a negative number is converted 16−bit data K−100 F75 (BINA) instruction execution Converted result − (Space) (Space) ASCII code Extra bytes Range specified by S2 (6 bytes) When a positive number is converted 16−bit data K1234...
Page 440 High−level Instructions Flag conditions Σ Error flag (R9007): Turns on and stays on when: Σ Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The number of bytes specified by S2 exceeds the area specified by D. −...
Page 441 High−level Instructions (ABIN) ASCII code → 16-bit binary data (PABIN) Outline Converts ASCII code that expresses decimal digits to 16-bit data that expresses the equivalent number. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P76 (PABIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 442 High−level Instructions Description Converts the ASCII codes that express the decimal digits, starting from the 16-bit area specified by S1 to 16-bit data as specified by S2. The converted result is stored in the area specified by D. S2 specifies the number of source data bytes to be converted using decimal number. (This specification cannot be made with BCD data.) Precautions during programming The ASCII codes being converted should be stored in the direction of the last address in the specified area.
Page 443 High−level Instructions Example of converting an ASCII code indicating a positive number Example 1: ASCII code S1+2 S1+1 (Space) (Space) ASCII code Extra bytes Range specified by S2 Example 2: ASCII code S1+2 S1+1 (Space) (Space) (Space) ASCII code Extra bytes Range specified by S2 F76 (ABIN) instruction execution Converted result...
Page 444 High−level Instructions (DBIA) 32-bit binary data → ASCII code (PDBIA) Outline Converts 32-bit data to ASCII code that expresses the equivalent decimals. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P77 (PDBIA)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 445 High−level Instructions Explanation of example Converts the 32-bit data stored in data registers DT1 and DT0 to ASCII code that expresses the equivalent decimals when trigger R0 turns on. The converted data is stored in data registers DT54 to DT50 (10 bytes). Source ·...
Page 446 High−level Instructions Conversion Example The following shows conversion from 32−bit decimal format data to ASCII codes. Example of converting a negative number 32−bit data S1+1 K−12345678 F77 (DBIA) instruction execution Converted result − (Space) ASCII code Extra byte Range specified by S2 (10 bytes) Example of converting a positive number S1+1 32−bit data...
Page 447 High−level Instructions (DABI) ASCII code → 32-bit binary data (PDABI) Outline Converts ASCII code that expresses decimal digits to 32-bit data that expresses the equivalent number. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P78 (PDABI)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 448 High−level Instructions Description Converts ASCII code that expresses the decimal digits, starting from the 16-bit area specified by S1 to 32-bit data as specified by S2. The converted result is stored in the area starting from the 16-bit area specified by D. S2 specifies the number of bytes used to express the destination data using decimals.
Page 449 High−level Instructions Example of converting an ASCII code indicating a positive number Example 1: ASCII code S1+3 S1+2 S1+1 ASCII code Range specified by S2 (8 bytes) Example 2: ASCII code S1+4 S1+3 S1+2 S1+1 (Space) ASCII code Extra byte Range specified by S2 (10 bytes) F78 (DABI) instruction execution Converted result of...
Page 450 High−level Instructions (BCD) 16-bit binary data → 4-digit BCD data (PBCD) Outline Converts 16-bit binary data to BCD code the expresses a 4-digit decimal. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P80 (PBCD)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 451 High−level Instructions Explanation of example Converts the contents of data register DT10 to BCD code that expresses a 4-digit decimal when trigger R0 turns on. The converted data is stored in data register DT20. If DT10 is 16 using decimal number conversion, the following will be stored in DT20. Source [S]: K16 Bit position ·...
Page 452 High−level Instructions (BIN) 4-digit BCD data → 16-bit binary data (PBIN) Outline Converts BCD code that expresses a 4-digit decimal to 16-bit binary data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P81 (PBIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 453 High−level Instructions Explanation of example Converts the contents of data register DT10 to 16-bit binary data when trigger R0 turns on. The converted data is stored in data register DT20. If DT10 is BCD data consisting of H15, the following will be stored in DT20. Source [S]: H15 (BCD) Bit position ·...
Page 454 High−level Instructions (DBCD) 32-bit binary data → 8-digit BCD data (PDBCD) Outline Converts 32-bit binary data to BCD code that expresses an 8-digit decimal. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P82 (PDBCD)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 455 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − When the range that binary data can be BCD converted is exceeded. (When minus or when K99999999 is exceeded) 3 −...
Page 456 High−level Instructions (DBIN) 8-digit BCD data → 32-bit binary data (PDBIN) Outline Converts BCD code that expresses an 8-digit decimal to 32-bit binary data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P83 (PDBIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 457 High−level Instructions (INV) 16-bit data invert (PINV) Outline Inverts all bits in the 16-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P84 (PINV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 84 (INV) F84 INV , DT 0 16-bit area to be inverted...
Page 458 High−level Instructions (NEG) 16-bit data complement of 2 (PNEG) Outline Takes complement of 2 in 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P85 (PNEG)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 85 (NEG) F85 NEG , DT 0...
Page 459 High−level Instructions Description Takes two’s complement of 16-bit data specified by D. The two’s complement is obtained by inverting all bits and adding 1 to the inverted result. This instruction is useful for changing the sign of 16-bit data from positive to negative or from negative to positive.
Page 460 High−level Instructions (DNEG) 32-bit data complement of 2 (PDNEG) Outline Takes complement of 2 in 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P86 (PDNEG)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 86 (DNEG) F86 DNEG , DT 0...
Page 461 High−level Instructions Description Takes two’s complement of 32-bit data specified by D. The two’s complement is obtained by inverting all bits and adding 1 to the inverted result. This instruction is useful for changing the sign of 32-bit data from positive to negative or from negative to positive.
Page 462 High−level Instructions (ABS) 16-bit data absolute value (PABS) Outline Takes absolute value of signed 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P87 (PABS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 87 (ABS) F87 ABS , DT 0 16-bit area for storing original data and its absolute value...
Page 463 High−level Instructions (DABS) 32-bit data absolute value (PDABS) Outline Takes absolute value of signed 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P88 (PDABS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 88 (DABS) F88 DABS , DT 0 Lower 16-bit area of 32-bit data for storing original data and its absolute value...
Page 464 High−level Instructions (EXT) 16-bit data sign extension (PEXT) Outline Copies the sign bit of the specified 16-bit data to all the bits of the higher 16-bit area (extended 16-bit area). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P89 (PEXT)” is not available. Program example Boolean Ladder Diagram...
Page 465 High−level Instructions Explanation of example Copies the sign bit of data register DT0 to all the bits of data register DT1 when trigger R20 turns on. If K−2 is stored in DT0, the data will be as follows. Sign bit (0: positive, 1: negative) Bit position 1211 ·...
Page 466 High−level Instructions (DECO) Decode (PDECO) Outline Decodes the specified data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P90 (PDECO)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 90 (DECO) F90 DECO, DT10, H404, DT20 16-bit equivalent constant or 16-bit area to be decoded (source) 16-bit area equivalent constant or 16-bit area to specify starting bit position and number of bits to be decoded...
Page 467 High−level Instructions Description Decodes the contents of 16-bit data specified by S according to the contents of n. The decoded result is stored in the area starting from 16-bit area specified by D. The length of the area required to store decoding results changes depending on the length of the data being decoded.
Page 468 High−level Instructions Relationship between number of bits and occupied data area for decoded result Number of bits to be Data area required for the Valid bits in the area for the decoded result result 1-word 2-bit* 1-word 4-bit* 1-word 8-bit* 1-word 16-bit 2-word...
Page 469 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The number of bits to be decoded is outside the range of 1 to 8. −...
Page 470 High−level Instructions (SEGT) 7-segment decode (PSEGT) Outline Converts 16-bit data to 4-digit data for 7-segment indication. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P91 (PSEGT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 91 (SEGT) F91 SEGT , DT 0 , DT10 16-bit equivalent constant or 16-bit area to be converted to the 7-segment...
Page 471 High−level Instructions Description Converts the 16-bit equivalent constant or 16-bit data specified by S to 4-digit data for 7-segment indication. The converted data is stored in the area starting from the 16-bit area specified by D. The relationship between the displayed contents and the contents specified for S, and the data of the 7−segment display is shown below.
Page 472 High−level Instructions (ENCO) Encode (PENCO) Outline Encodes the specified data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P92 (PENCO)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 92 (ENCO) F92 ENCO, DT10, H5 , DT20 Starting 16-bit area to be encoded (source) 16-bit equivalent constant or 16-bit area to specify starting bit position and number of bits to be encoded...
Page 473 High−level Instructions Explanation of example Encodes contens of data register DT11 and DT10 according to the n: H5 when trigger R20 turns on. The encoded result is stored in 8 bits of data register DT20 starting from bit position 0. When n: H0005 Number of bits to be encoded: 2 = 32 bits...
Page 474 High−level Instructions How to specify control data “n” n specifies the starting bit position of destination data and the number of bits to be decoded using hexadecimal data. 16-bit data · · · · · · · · · 12 11 Bit position —...
Page 475 High−level Instructions Encoded example When encoding 16-bit data (nL=4), the encoded results are shown below. Data to be encoded Encoded result Encoded result [Binary (decimal)] 15 ・・ 12 11 ・・ 7 ・・ 4 3 ・・ 0 0 0 0 0 0 0 0 0 0 0 0 0...
Page 476 High−level Instructions (UNIT) 16-bit data combine (PUNIT) Outline Extracts the lower 4 bits (bit positions 0 to 3) of the specified 16-bit areas and combines them into one word. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P93 (PUNIT)” is not available. Program example Boolean Ladder Diagram...
Page 477 High−level Instructions Explanation of example Extracts lower 4 bits of data registers DT12 to DT10, combines the extracted data, and stores it in data register DT20 when trigger R20 turns on. Bit position · · · · · · · ·...
Page 478 High−level Instructions (DIST) 16-bit data distribute (PDIST) Outline Divides the specified 16-bit data into four 4-bit units and distributes the divided data into the lower 4 bits of the specified 16-bit areas. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P94 (PDIST)”...
Page 479 High−level Instructions Explanation of example Divides the 16-bit data of data register DT10 into 4-bit units and the divided data is stored in the lower 4 bits (bit positions 0 to 3) of data registers DT20 to DT23 when trigger R20 turns on. Bit position ·...
Page 480 High−level Instructions (ASC) Character → ASCII code (PASC) Outline Converts character constants to ASCII code. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P95 (PASC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (ASC) M ABC1230_DEF F95 ASC, M ABC1230_DEF, DT 2 “_”...
Page 481 High−level Instructions Description Converts the character constants specified by S to ASCII code. The converted ASCII code is stored in 6 words starting from the 16-bit area specified by D. Precautions during programming The character constant M can be input with the programming tool software. Convertion example of one character constant “A”...
Page 482 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when the last area for ASCII code exceeds the limit (6 words: six 16-bit areas). ・Error flag (R9008): Turns on for an instant when the last area for ASCII code exceeds the limit (6 words: six 16-bit areas).
Page 483 High−level Instructions 3 − 219 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 484 High−level Instructions (SRC) 16−bit data search (PSRC) Outline Searches for a specified value in a block of 16-bit areas. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P96 (PSRC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F 96...
Page 485 High−level Instructions Explanation of example Searches for the value given in data register DT10 in the block of data register DT20 through DT40 when trigger R0 turns on. For example, to search the area of the value called H1234, “H1234” would be written to DT10. Searched data Block of 16−bit areas DT10:...
Page 486 High−level Instructions (DSRC) 32-bit data search (PDSRC) Outline Searches for a specified value in a block of 32-bit areas. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P97 (PDSRC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (DSRC)
Page 487 High−level Instructions Explanation of example Searches for the value given in data registers DT10 and DT11 in the block of data register DT20 through DT40 when trigger R0 turns on. For example, to search the area of the value called H01234567, “H01234567” would be written to DT10 and DT11.
Page 488 High−level Instructions (CMPR) Data table shift−out and compress (PCMPR) Outline Shifts out non-zero data stored at the highest address of the table to the specified area and compresses the data in the table to the higher address. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P98 (PCMPR)”...
Page 489 High−level Instructions Explanation of example If the execution condition (trigger) R0 is on, the contents of data register DT5 are sent to data register DT10. Also, in the range from DT0 to DT5, non−zero contents are stored in sequential order, starting from DT5. The “0 (zero)”...
Page 490 High−level Instructions Application example In combination with the F99 (CMPW)/P99 (PCMPW) instruction, this can be used to construct an optional buffer. (1) Executing the F99 (CMPW)/P99 (PCMPW) instruction When data items are written to the first address of the buffer (the area of the specified range), they are stored and accumulated in the buffer in sequential order.
Page 491 High−level Instructions (CMPW) Data table shift−in and compress (PCMPW) Outline Shifts in data to the smallest address of the specified data table and compresses the data in the table toward the higher address. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P99 (PCMPW)”...
Page 492 High−level Instructions Explanation of example If the execution condition (trigger) R0 is on, the contents of data register DT10 are sent to data register DT0. Also, in the range from DT0 to DT5, non−zero contents are stored in sequential order, starting from DT5. The “0 (zero)”...
Page 493 High−level Instructions Application example In combination with the F98 (CMPR)/P98 (PCMPR) instruction, this can be used to construct an optional buffer. (1) Executing the F99 (CMPW)/P99 (PCMPW) instruction When data items are written to the first address of the buffer (the area of the specified range), they are stored and accumulated in the buffer in sequential order.
Page 494 High−level Instructions F100 (SHR) Right shift of multiple bits (n bits) in a 16−bit data P100 (PSHR) Outline Shifts a specified number of bits to the right in bit units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P100 (PSHR)” is not available. Program example Boolean Ladder Diagram...
Page 495 High−level Instructions Description Shifts n bits of the 16-bit data area specified by D to the right (to the lower bit position). Bit position 1211 · · · · · · · · The data in the n th bit is transferred to R9009 (carry flag). Bit position ·...
Page 496 High−level Instructions F101 (SHL) Left shift of multiple bits (n bits) in a 16−bit data P101 (PSHL) Outline Shifts a specified number of bits to the left in bit units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P101 (PSHL)” is not available. Program example Boolean Ladder Diagram...
Page 497 High−level Instructions Description Shifts n bits of the 16-bit area specified by D to the left (to the higher bit position). Bit position 1211 · · · · · · · · · The data in the n th bit is transferred to R9009 (carry flag).
Page 498 High−level Instructions F102 (DSHR) Right shift of n bits in a 32-bit data P102 (PDSHR) Outline Shifts a specified number of bits to the right in bit units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P102 (PDSHR)” is not available. Program example Boolean Ladder Diagram...
Page 499 High−level Instructions Description Shifts n bits of the 32-bit data area specified by D to the right (to the lower bit position) when the trigger turns [D+1] [n bits] 0 15 00000000 The data in the nth bit is transferred to R9009 (carry flag). The [n bits] are filled with 0s.
Page 500 High−level Instructions F103 (DSHL) Left shift of n bits in a 32-bit data P103 (PDSHL) Outline Shifts a specified number of bits to the left in bit units. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P103 (PDSHL)” is not available. Program example Boolean Ladder Diagram...
Page 501 High−level Instructions Only the lower eight bits of the 16-bit data [n] are effective. Select the amount of the shift within the range 1 to 255 bits. − − − − − − − − 0 0 0 0 0 0 0 0 Upper 8 bits K0 to K255(H00 to HFF) are invalid...
Page 502 High−level Instructions F105 (BSR) Right shift of one hexadecimal digit (4 bits) P105 (PBSR) Outline Shifts one hexadecimal digit (4 bits) of the specified 16-bit data to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P105 (PBSR)” is not available. Program example Boolean Ladder Diagram...
Page 503 High−level Instructions Description Shifts one hexadecimal digit (4 bits) of the 16-bit area specified by D to the right (to the lower digit position). 1211 Bit position · · · · · · · · · Hexadecimal Digit 4 Digit 3 Digit 2 Digit 1 Bit position...
Page 504 High−level Instructions F106 (BSL) Left shift of one hexadecimal digit (4 bits) P106 (PBSL) Outline Shifts one hexadecimal digit (4 bits) of the specified 16-bit data to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P106 (PBSL)” is not available. Program example Boolean Ladder Diagram...
Page 505 High−level Instructions Description Shifts one hexadecimal digit (4 bits) of the 16-bit area specified by D to the left (to the higher digit position). 1211 Bit position · · · · · · · · · Hexadecimal Digit 4 Digit 3 Digit 2 Digit 1 Bit position...
Page 506 High−level Instructions F108 (BITR) Right shift of multiple bits of 16-bit data range P108 (PBITR) Outline Shifts multiple bits of a specified 16-bit data range to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P108 (PBITR)” is not available. Program example Boolean Ladder Diagram...
Page 507 High−level Instructions Description Shifts n bits of the data range specified by D1 (starting) and D2 (ending) to the right (to the lower bit position) when the trigger turns on. Specified data range The n bits are Trigger: on shifted out. n bits D1 and D2 should be: −...
Page 508 High−level Instructions F109 (BITL) Left shift of multiple bits of 16-bit data range P109 (PBITL) Outline Shifts multiple bits of a specified 16-bit data range to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P109 (PBITL)” is not available. Program example Boolean Ladder Diagram...
Page 509 High−level Instructions Description Shifts n bits of the data range specified by D1 (starting) and D2 (ending) to the left (to the higher bit position) when the trigger turns on. Specified data range The ending n bits Trigger: on are shifted out. n bits D1 and D2 should be: −...
Page 510 High−level Instructions F110 (WSHR) Right shift of one word (16 bits) of 16-bit data range P110 (PWSHR) Outline Shifts one word (16 bits) of a specified 16-bit data range to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P110 (PWSHR)”...
Page 511 High−level Instructions Description Shifts one word (16 bits) of the data range specified by D1 (starting) and D2 (ending) to the right (to the lower word address). Specified data range The starting word is shifted out. The data in the ending word becomes 0.
Page 512 High−level Instructions F111 (WSHL) Left shift of one word (16 bits) of 16-bit data range P111 (PWSHL) Outline Shifts one word (16 bits) of a specified 16-bit data range to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction (PWSHL)”...
Page 513 High−level Instructions Description Shifts one word (16 bits) of the data range specified by D1 (starting) and D2 (ending) to the left (to the higher word address). Specified data range The ending word is shifted out. The data in the starting word becomes 0.
Page 514 High−level Instructions F112 (WBSR) Right shift of one hexadecimal digit (4−bit) P112 of 16-bit data range (PWBSR) Outline Shifts one hexadecimal digit (4 bits) of a specified 16-bit data range to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available.
Page 515 High−level Instructions Description Shifts one hexadecimal digit (4 bits) of the data range specified by D1 (starting) and D2 (ending) to the right (to the lower digit position). Specified data range 15 1211 · · 0 15 1211 · · ·...
Page 516 High−level Instructions F113 (WBSL) Left shift of one hexadecimal digit (4−bit) P113 of 16-bit data range (PWBSL) Outline Shifts one hexadecimal digit (4 bits) of a specified 16-bit data range to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P113 (PWBSL)”...
Page 517 High−level Instructions Description Shifts one hexadecimal digit (4 bits) of the data range specified by D1 (starting) and D2 (ending) to the left (to the higher digit position). Specified data range 15 1211 · · 0 15 1211 · · ·...
Page 518 High−level Instructions F115 (FIFT) FIFO buffer definition P115 (PFIFT) Outline Defines the FIFO buffer conditions. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P115 (PFIFT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F115 (FIFT) F115 FIFT, K 256, DT 0 16-bit equivalent constant or 16−bit area for specifying the memory size of FIFO buffer...
Page 519 High−level Instructions Description This defines the area used as the FIFO buffer. A data storage area of n words (n = K1 to K256) is defined for the area specified by D. Definition of the area using the F115 (FIFT) instruction should be carried out only once, before writing to or reading from the FIFO buffer.
Page 520 High−level Instructions F116 (FIFR) Data read from FIFO buffer P116 (PFIFR) Outline Reads data from the FIFO buffer. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P116 (PFIFR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F116 (FIFR)
Page 521 High−level Instructions Explanation of example When the execution condition (trigger) R10 is on, data is read from the FIFO buffer area headed by DT0, and is stored in DT100. When the reading pointer is 2 Reading pointer (H0204) K100 K101 DT100 K102 ▲DT5...
Page 522 High−level Instructions The reading pointer is stored in the upper eight bits of the third word of the FIFO buffer area, and is indicated by an address in the data storage area. The actual address is the value of the leading address in the FIFO buffer area specified by S, plus 3, plus the value of reading pointer (the value of which only the first byte is a decimal value).
Page 523 High−level Instructions Precautions during programming An error occurs if the F116 (FIFR) instruction is executed when the number of stored data items (S+1) is 0. In the program noted below, the F116 (FIFR) instruction is not executed if the number of stored data items is 0. FIFO definition F115 FIFT, K256, DT0 R9010...
Page 524 High−level Instructions F117 (FIFW) Data write to FIFO buffer P117 (PFIFW) Outline Writes data to the FIFO buffer. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P117 (PFIFW)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F117 (FIFW)
Page 525 High−level Instructions Explanation of example When the execution condition (trigger) R10 is on, the contents of DT110 are written to the FIFO buffer area headed by DT0. When the writing pointer is 3 Writing pointer (H0003) Read pointer▲ K100 K101 DT110 K102 K103...
Page 526 High−level Instructions Description The 16−bit data specified by S will be stored in the FIFO buffer headed by the area specified by D. D should specify the beginning of the FIFO buffer defined by the F115 (FIFT) instruction. The specified data is written to the address indicated by the writing pointer when the instruction is executed. Memory size of FIFO buffer Number of stored data items (words) Writing pointer (lower)
Page 527 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The size (n) of the FIFO specified by D is n = 0, or when n > 256. −...
Page 528 High−level Instructions Precautions when using this instruction If data is received which exceeds the capacity of the buffer, an operation error will occur. Example: If the writing pointer is at the end of the FIFO buffer Reading K100 pointer ▲ K101 K102 K103...
Page 529 High−level Instructions Example: When the writing pointer has made one complete cycle Reading K100 pointer ▲ 0▲ Writing K101 K102 K105 K103 K104 Execution of F117 (FIFW) instruction K100 0▲ ▲DT3 Writing pointer 1 cycle K101 K102 K103 K104 An error occurs, and processing is not carried out. Because the number of data items stored in the FIFO buffer (DT1=5) exceeds the size of the FIFO buffer (DT0=5), the operation is not executed, and an operation error occurs.
Page 530 High−level Instructions Measures to avoid operation errors Do not execute the F117 (FIFW) instruction using the comparison instruction. Avoid executing the F117 (FIFW) instruction when the size of the FIFO buffer (DT0) is equal to the number of data items stored in the buffer (DT1).
Page 531 High−level Instructions F118 (UDC) UP/DOWN counter Outline Sets the UP/DOWN counter. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction F118 UDC UP/DOWN input DT 10 F118 (UDC) Count input DT 0 Reset input =, DT 0, K 0 16-bit equivalent constant or 16-bit area for counter preset value 16-bit area for counter elapsed value Operands...
Page 532 High−level Instructions Explanation of example The program on the preceding page shows an example in which initial values are set, and when the target value is 0, external output Y50 goes on. This can be used, for example, in programs such as those that cause a display lamp to light when the work being added or subtracted has reached a certain quantity.
Page 533 High−level Instructions Precautions during programming If the elapsed value area has been specified as a hold type memory area, the elapsed value acts in accordance with the contents being retained. Be aware that, when an operation is begun, the set values are not automatically preset to the elapsed value area.
Page 534 High−level Instructions F119 (LRSR) Left/right shift register Outline Shifts one bit of the 16-bit data range to the left or right. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Left/right input F119 LRSR (on: left, off: right) DT 0 Data input F119 (LRSR)
Page 535 High−level Instructions Explanation of example Left shift operation 15 . . 12 11 . . 8 7 . . 4 3 . . 0 15 . . 12 11 . . 8 7 . . 4 3 . . 0 Bit position Data 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1...
Page 536 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the starting 16-bit area (D1) is larger than the area specified by the ending 16-bit area (D2) (when D1 > D2). ・Error flag (R9008): Turns on for an instant when the area specified using the starting 16-bit area (D1) is larger than the area specified by the ending 16-bit area (D2) (when D1 >...
Page 537 High−level Instructions 3 − 273 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 538 High−level Instructions F120 (ROR) 16-bit data right rotation P120 (PROR) Outline Rotates a specified number of bits in specified 16-bit data to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P120 (PROR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 539 High−level Instructions Description Rotates “n” bits of the 16-bit data specified by D to the right. Example: Rotates 1 bit to the right Bit position 1211 · · · · · · · · · 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Bit position 1211 ·...
Page 540 High−level Instructions F121 (ROL) 16-bit data left rotation P121 (PROL) Outline Rotates a specified number of bits in specified 16-bit data to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P121 (PROL)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 541 High−level Instructions Description Rotates “n” bits of the 16-bit data specified by D to the left. Example: Rotates 1 bit to the left Bit position 12 11 · · · · · · · · · 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 12 11 Bit position ·...
Page 542 High−level Instructions F122 (RCR) 16-bit data right rotation with carry flag data P122 (PRCR) Outline Rotates a specified number of bits in the specified 16-bit data to the right together with carry flag data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P122 (PRCR)”...
Page 543 High−level Instructions Description Rotates “n” bits of the 16-bit data specified by D, including carry flag data, to the right. Example: Rotates 1 bit to the right Bit position 1211 · · · · · · · · · 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1211 Bit position ·...
Page 544 High−level Instructions F123 (RCL) 16-bit data left rotation with carry flag data P123 (PRCL) Outline Rotates a specified number of bits in the specified 16-bit data to the left together with carry flag data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P123 (PRCL)”...
Page 545 High−level Instructions Description Rotates “n” bits of the 16-bit data specified by D, including carry flag data, to the left. Example: Rotates 1 bit to the left Bit position 12 11 · · · · · · · · 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Bit position 12 11 ·...
Page 546 High−level Instructions F125 (DROR) 32-bit data right rotation P125 (PDROR) Outline Rotates a specified number of bits in specified 32-bit data to the right. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P125 (PDROR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 547 High−level Instructions Description Rotates “n” bits of the 32-bit data specified by D to the right when the trigger turns on. [D+1] 0 15 Trigger: Data in bit position 0 of D When “n” bits are rotated to the right, −...
Page 548 High−level Instructions F126 (DROL) 32-bit data left rotation P126 (PDROL) Outline Rotates a specified number of bits in specified 32-bit data to the left. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P126 (PDROL)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 549 High−level Instructions Description Rotates “n” bits of the 32-bit data specified by D to the left when the trigger turns on. [D+1] 0 15 Trigger: Content of MSB When “n” bits are rotated to the left, − The data in bit position 32-n (nth bit starting from bit position 31) is transferred to special internal relay R9009 (carry flag).
Page 550 High−level Instructions F127 (DRCR) 32-bit data right rotation with carry flag data P127 (PDRCR) Outline Rotates a specified number of bits in the specified 32-bit data to the right together with carry flag data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P127 (PDRCR)”...
Page 551 High−level Instructions Description Rotates “n” bits of the 32-bit data specified by D, including carry flag data, to the right when the trigger turns [D+1] 0 15 Carry flag Trigger: Data in bit position 0 of D When “n” bits with carry flag data are rotated to the right, −...
Page 552 High−level Instructions F128 (DRCL) 32-bit data left rotation with carry flag data P128 (PDRCL) Outline Rotates a specified number of bits in the specified 32-bit data to the left together with carry flag data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P128 (PDRCL)”...
Page 553 High−level Instructions Description Rotates “n” bits of the 32-bit data specified by D, including carry flag data, to the left when the trigger turns on. [D+1] 0 15 Carry flag Trigger: Content of MSB When “n” bits with carry flag data are rotated to the left, −...
Page 554 High−level Instructions F130 (BTS) 16-bit data bit set P130 (PBTS) Outline Turns on a specified bit of 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P130 (PBTS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F130...
Page 555 High−level Instructions Description Turns on the bit of 16-bit data specified by D and n. Bits other than the specified bit do not change. The “n” is decimal data specifying the bit position to be turned on. Range of “n”: K0 to K15 Bit position 12 11 ·...
Page 556 High−level Instructions F131 (BTR) 16-bit data bit reset P131 (PBTR) Outline Turns off a specified bit of 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P131 (PBTR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F131...
Page 557 High−level Instructions Description Turns off the bit of 16-bit data specified by D and n. Bits other than the specified bit do not change. The “n” is decimal data specifying the bit position to be turned off. Range of “n”: K0 to K15 Bit position 12 11 ·...
Page 558 High−level Instructions F132 (BTI) 16-bit data bit invert P132 (PBTI) Outline Inverts a specified bit in 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P132 (PBTI)” is are not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F132...
Page 559 High−level Instructions Description Inverts [off (0) → on (1) or on (1) → off (1)] the state at bit position specified by “n” in the 16-bit area specified by D. Bits other than the specified bit are not inverted. The “n” is decimal data specifying the bit position to be inverted. Range of “n”: K0 to K15 Bit position 12 11 ·...
Page 560 High−level Instructions F133 (BTT) 16-bit data bit test P133 (PBTT) Outline Checks the state [on (1) or off (0)] of the specified bit in 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P133 (PBTT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 561 High−level Instructions Description Checks the state [on (1) or off (0)] of bit position specified by n in the 16-bit data specified by D. The judgment result is output to special internal relay R900B (=flag). The specified bit is checked by special internal relay R900B. −...
Page 562 High−level Instructions F135 (BCU) Number of on (1) bits in 16-bit data P135 (PBCU) Outline Counts the number of bits in the on (1) state in the specified 16-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P135 (PBCU)” is not available. Program example Boolean Ladder Diagram...
Page 563 High−level Instructions Description Counts the number of bits in the on (1) state in the 16-bit data specified by S. The counted result (number of on (1) bits) is stored in the 16-bit area specified by D. The results are stored in decimal number. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 564 High−level Instructions F136 (DBCU) Number of on (1) bits in 32-bit data P136 (PDBCU) Outline Counts the number of bits in the on (1) state in specified 32-bit data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P136 (PDBCU)” is not available. Program example Boolean Ladder Diagram...
Page 565 High−level Instructions Description Counts the number of bits in the on (1) state in the 32-bit data specified by S. The counted result (number of on (1) bits) is stored in the 16-bit area specified by D. The results are stored in decimal number. Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 566 High−level Instructions F137 (STMR) Auxiliary timer (16−bit) Outline Sets the 16−bit on−delay timer for 0.01 s units (0.01 to 327.67 s) Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F137 (STMR) F137 STMR , DT10 , DT20 16-bit equivalent constant or 16-bit area for timer set value 16-bit area for timer elapsed value Operands Index...
Page 567 High−level Instructions When the time set for the special internal relay R900D has elapsed, the relay is turned on. R900D can also be used as a timer contact. (The relay is off when the execution condition (trigger) is off, and while subtraction is being carried out.) F137 STMR, DT10,DT20 R900D...
Page 568 High−level Instructions If the value in the elapsed value area D reaches 0, relay being used is turned on by the OT instruction which comes next in the program. The special internal relay R900D also goes on at this point. DT20 F137 STMR, DT10, DT20 R900D...
Page 569 High−level Instructions F138 (HMSS) Hours, minutes, and seconds data to seconds data P138 (PHMSS) Outline Converts hour, minute, and second data to seconds data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P138 (PHMSS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 570 High−level Instructions Description Converts the hour, minute, and second data stored in the 32-bit area specified by S to seconds data. The converted seconds data is stored in the 32-bit area specified by D. Composition of data Format of S+1 and S 32 bits (2 words) “S+1 and S”...
Page 571 High−level Instructions F139 (SHMS) Seconds data to hours, minutes, and seconds data P139 (PSHMS) Outline Converts seconds data to hour, minute, and second data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P139 (PSHMS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 572 High−level Instructions Description Converts the seconds data stored in the 32-bit area specified by S to hour, minute, and second data. The converted hour, minute, and second data is stored in the 32-bit area specified by D. Composition of data Format of S+1 and S 32 bits (2 words) “S+1 and S”...
Page 573 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The data specified by S is not BCD data. −...
Page 574 High−level Instructions F140 (STC) Carry flag (R9009) set P140 (PSTC) Outline Turns on special internal relay R9009 (carry flag). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P140 (PSTC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F140...
Page 575 High−level Instructions F141 (CLC) Carry flag (R9009) reset P141 (PCLC) Outline Turns off special internal relay R9009 (carry flag). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P141 (PCLC)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F141...
Page 576 High−level Instructions F142 (WDT) Watching dog timer update P142 (PWDT) Outline Updates the time−out time of watching dog timer. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F142 (WDT) F142 WDT , K 128 Constant for specifying the watching dog timer value Operands Index Relay...
Page 577 High−level Instructions Precautions during programming The F142 (WDT) instruction may be used any number of times. To change the time−out time through operation, use the process described below. 1) Execute the F142 (WDT) instruction immediately prior to the block to be processed, and specify the preset.
Page 578 High−level Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability F143 (IORF) Partial I/O update FP0/FP0R/FP−e/ FPΣ/FP−X Outline Updates specified partial I/O points. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Input update Trigger F143 (IORF) F143 IORF , WX 0 , WX 0 Output update F143 (IORF) F143 IORF , WY 0 , WY 0...
Page 579 High−level Instructions FP0/FP0R/FP−e/FPΣ/FP−X Availability of the partial I/O update for various models FPΣ Add−on FP−X Control unit Expansion Expansion cassette Expansion Adapter — — — — FP0R — — — — FP−e — — — — — — — — Σ...
Page 580 High−level Instructions FP2/FP2SH/FP10SH F143 (IORF) Partial I/O update Availability P143 (PIORF) FP2/FP2SH/FP10SH Outline Updates specified partial I/O points. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F143 (IORF) F143 IORF , K 0 , Starting word address Ending word address Operands Index Relay...
Page 581 High−level Instructions FP2/FP2SH/FP10SH Description Updates the input and output relays (X and Y) specified by D1 and D2 immediately even in the program execution stage. Refreshing (updating) initiated by the F143 (IORF) instruction is done only for the unit on the master and expansion backplanes.
Page 582 High−level Instructions FP0/FP−e Availability F144 (TRNS) Serial data communication FP0/FP−e Outline Communicates with an external device using the RS232C port. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F144 (TRNS) F144 TRNS, DT 100, K 8 Starting 16-bit area for storing data to be sent 16-bit equivalent constant or 16-bit area to specify number of bytes to be sent −...
Page 583 High−level Instructions FP0/FP−e Description Use this instruction for communication (transmission and reception) of command and data when an external device (personal computer, measuring instrument, bar code reader, etc.) is connected to the RS232C port. Transmission The “n” bytes of the data stored in the data table with the starting area specified by S are transmitted from the RS232C port to an external device by serial transmission.
Page 584 High−level Instructions FP0/FP−e Program and operation during transmission To transmit, write the transmission data to the data table, select it with an F144 (TRNS) instruction, and execute. Data table for transmission Data register areas beginning with the area selected by S are used as the data table for transmission. The number of bytes not yet transmitted is stored here.
Page 585 High−level Instructions FP0/FP−e Program Select the starting address of the transmission data table with S and the number of transmission data bytes with “n”. Write the transmission F1 DMV, H44434241, DT101 data to the data table F1 DMV, H48474645, DT103 Transmit the data in F144 TRNS, DT100, K 8 the data table...
Page 586 High−level Instructions FP0/FP−e Setting the reception buffer: System register 417 and 418 All areas of the data register are initially set for use as the reception buffer. To change the reception buffer, set the starting area number in system register 417 and the size (number of words, Max. 1,024 words) in system register 418.
Page 587 High−level Instructions FP0/FP−e Example: Reception of the eight characters A, B, C, D, E, F, G, and H (8 bytes of data) from an external device The reception buffer is DT200 to DT204 in this example. System register settings are as follows: −...
Page 588 High−level Instructions FP0/FP−e Operation When the reception completed flag (9038) is off and data is sent from an external device, operation will proceed as follows. (After RUN, R9038 is off during the first scan.) 1) The data received is stored in order in the reception data storage area of reception buffer beginning from the lower byte of the second word of the area.
Page 589 High−level Instructions FP2/FP2SH/FP10SH Availability F144 (TRNS) Serial data communication FP2/FP2SH/FP10SH Outline Communicates with an external device using the COM. port of CPU. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F144 (TRNS) F144 TRNS, DT 100, K 8 Starting 16-bit area for storing data to be sent 16-bit equivalent constant or 16-bit area to specify number of bytes to be sent −...
Page 590 High−level Instructions FP2/FP2SH/FP10SH Description Use this instruction for communication (transmission and reception) of command and data when an external device (personal computer, measuring instrument, bar code reader, etc.) is connected to the COM. port of CPU. Transmission The “n” bytes of the data stored in the data table with the starting area specified by S are transmitted from the COM.
Page 591 High−level Instructions FP2/FP2SH/FP10SH Preparation of transmission 1) Setting the transmission format For FP10SH The initial settings for the transmission format are as follows: − Data length: 8 bits − Parity check: Yes, odd − Stop bits: 1 bit − End code: C −...
Page 592 High−level Instructions FP2/FP2SH/FP10SH 2) Setting the baud rate For FP10SH The baud rate (transmission speed) for serial transmission is initially set to 9600 bps. To change the baud rate to match the external device connected to the COM. port, set the lower row of operation mode switches as shown below.
Page 593 High−level Instructions FP2/FP2SH/FP10SH Program and operation during transmission To transmit, write the transmission data to the data table, select it with an F144 (TRNS) instruction, and execute. Data table for transmission Data register areas beginning with the area selected by S are used as the data table for transmission. The number of bytes not yet transmitted is stored here.
Page 594 High−level Instructions FP2/FP2SH/FP10SH Program Select the starting address of the transmission data table with S and the number of transmission data bytes with “n”. Write the transmission F1 DMV, H44434241, DT101 data to the data table F1 DMV, H48474645, DT103 Transmit the data in F144 TRNS, DT100, K 8 the data table...
Page 595 High−level Instructions FP2/FP2SH/FP10SH Preparation of reception 1) Setting the transmission format For FP10SH The initial settings for the transmission format are as follows: − Data length: 8 bits − Parity check: Yes, odd − Stop bits: 1 bit − End code: C −...
Page 596 High−level Instructions FP2/FP2SH/FP10SH 2) Setting the baud rate For FP10SH The baud rate (transmission speed) for serial transmission is initially set to 9600 bps. To change the baud rate to match the external device connected to the COM. port, set the lower row of operation mode switches as shown below.
Page 597 High−level Instructions FP2/FP2SH/FP10SH Program and operation during reception Data sent from the external device connected to the COM port will be stored in the data register areas set as the reception buffer. Reception buffer Word Area used for (address) 0 number of bytes received Area used for storing received data...
Page 598 High−level Instructions FP2/FP2SH/FP10SH Program When reception of data from an external device has been completed, the reception completed flag (R9038) goes on and further reception of data is not allowed. To receive more data, an F144 (TRNS) instruction must be executed to turn off the reception completed flag (R9038) and clear the byte number to zero.
Page 599 High−level Instructions FPΣ/FP−X/FP0R F145 (SEND) Availability Data send FP0R P145 (For MEWTOCOL master mode) FP−X: Ver 1.2 or more (PSEND) FPΣ: 32k Outline Sends specified data to another PLC or computer from the serial port of the unit. Program example Boolean Ladder Diagram Ladder Diagram...
Page 600 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item The control data specified by [S1][S1+1] is specified as follows. [S1]: Specifying transmission unit and transmission method [S1]: Word unit Specifies No. of transmisson words transmission H001 to H1FB (1 to 507): when transmitting to Group A H001 to H18 (1 to 24)*: when transmitting to Group B H1FB is 507 words.
Page 601 High−level Instructions FPΣ/FP−X/FP0R Flag conditions Σ Error flag (R9007) : Turns on and stays on when: Σ Error flag (R9008) : Turns on for an instant when: − The control data of [S1] and [S1+1] is a value outside of the specified range.
Page 602 High−level Instructions FPΣ/FP−X/FP0R For information on the contents of error codes, refer to the manual. If the error code is H73, a communication time−out error has occurred. The time−out time can be changed within a range of 10.0 ms to 81.9 seconds (in units of 2.5 ms), using the setting of system register 32.
Page 603 High−level Instructions FPΣ/FP−X/FP0R F145 (SEND) Data send Availability P145 (For MODBUS master mode) FP0R/FP−X (PSEND) FPΣ: 32k Outline Sends specified data to another PLC or computer from the serial port of the unit. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 604 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item The control data specified by [S1][S1+1] is specified as follows. [S1]: Specifying transmission unit and transmission method [S1]: Word unit Specifies No. of transmisson words (H001 to H07F) transmission *According to the restrictions on the MODBUS protocol. H0 fixed [S1]: Bit No.
Page 605 High−level Instructions FPΣ/FP−X/FP0R Explanation of command Command 05 (Y, R single write) send Example) When the value of the bit 0 of WR3 is transmitted to the 1st bit of WY1 of the unit No. 7 in the remote unit from the COM1. [ F145 (SEND), DT10, WR3, WY0, K1 ] DT10 H0 fixed...
Page 606 High−level Instructions FPΣ/FP−X/FP0R Command 15 (Y, R multi−points write) send Example) When the 64−bit data from the bit 0 of the WR3 to the bit F of the WR6 is transmitted to the W0 to Y3F of the unit No. 7 in the remote unit from the COM1. [ F145 (SEND), DT10, WR3, WY0, K0 ] DT10 [S1]:...
Page 607 High−level Instructions FPΣ/FP−X/FP0R Command 16 (DT multi−words write) send Example) When the 3−word data from WR3 to WR5 is transmitted to DT500 to DT502 of the unit No. 7 of the remote unit. [ F145 (SEND), DT10, WR3, DT0, K500 ] DT10 [S1]: Word unit...
Page 608 High−level Instructions FPΣ/FP−X/FP0R The SEND instruction only requests that the data be sent, but the actual processing takes place when the ED instruction is executed. The SEND/RECV execution end flag (R9045: COM1/R904B: COM2) can be used to check whether or not the transmission has been completed.
Page 609 High−level Instructions FPΣ/FP−X/FP0R Availability FP0R F145 Data send (MODBUS master II: Type (SEND) FP−X: Ver. 2.50 directly specifying MODBUS address) FPΣ: Ver. 3.20 Outline Sends specified data to another PLC or computer from the serial port of the unit. Feature: Data can be transmitted with this instruction only. Program example Boolean Ladder Diagram...
Page 610 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item [S1]: Specifying port number, transmission command and destination unit number H1 or H2 H5 or H6 [S1]: Selects COM Specifies Unit No. (H00 to HFF) port transmission command (1) Specifying COM port Specify H1 for COM 1 port, and H2 for COM2 port. If only one COM port is available, specify H1.
Page 611 High−level Instructions FPΣ/FP−X/FP0R Command 06 (Register single preset) Example) When the 1−word data of WR3 is transmitted to the address H7788 of the unit No. 7 from the COM1. [ F145(SEND), H1607, WR3, H7788, K1 ] [S1]: Selects COM port Unit No.
Page 612 High−level Instructions FPΣ/FP−X/FP0R Command 16 (Multi−point register preset) send Example) When the 3−word data from DT3 to DT5 is transmitted to the address H7788 of the unit No. 7 from the COM1 port. [ F145(SEND), H1607, DT3, H7788, K3 ] [S1]: Selects COM port Unit No.
Page 613 High−level Instructions FPΣ/FP−X/FP0R Precautions during programming It is not possible to execute multiple F145 (SEND) instructions and F146 (RECV) instructions for the same communication port simultaneously. The program should be set up so that these instructions are executed when the SEND/RECV execution enabled flag (R9044: COM1/R904A: COM2) is on.
Page 614 High−level Instructions F145 (SEND) Data send (MEWNET link) P145 (PSEND) Outline Sends data to another station through link modules in the network. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F145 (SEND) F145 SEND, DT10 , DT20 , DT 0 , K 100 Starting 16-bit area for storing control data Starting 16-bit area for storing source data (data area at the local station) Type of destination operands for storing data in the remote station.
Page 615 High−level Instructions Example of bit unit transmission When the control data is as follows: DT10(S1)=H850D Bit unit Bit No. 13 of local station Bit No. 5 of remote station DT11(S1+1)=H010A Unit No.10 Route No.1 the on and off information of Bit No. 13 of DT20 is sent to Bit No. 5 of DT100 of Unit No. 10, which is connected to route No.
Page 616 High−level Instructions Specifying the various items Control data (S1) Specifying the remote station Specify the remote station by means of a route number and unit number. The setting is entered differently depending on whether the remote station is a PLC in the same network, or a PLC in a network on a different hierarchical level.
Page 617 High−level Instructions (1) Specifying word unit transmission If word unit transmission is being used, the data for the specified number of words is sent from the memory area of the local station specified by S2, and is stored at the beginning of the memory area of the remote station specified by D and N.
Page 618 High−level Instructions Sending data to a PLC on a different hierarchical level What is a hierarchical link? A hierarchical link functions as a relay station between two link units installed on the same backplane, enabling communication between CPUs belonging to different networks. Example: Communicating with a CPU at depth 1 Local...
Page 619 High−level Instructions Example: Communicating with a CPU at depth 3 (sending data from CPU1 to CPU5) Depth 0 Depth 1 Depth 2 Depth 3 The numbers CPU1 to CPU5 have been temporarily assigned, for the purpose of indicating the relay order of the hierarchical links.
Page 620 High−level Instructions (1) Specifying word unit transmission If word unit transmission is being used, the data for the specified number of words is sent from the memory area of the local station specified by S2, and is stored starting from the beginning of the memory area of the remote station specified by D and N.
Page 621 High−level Instructions Specifying the relay station S+1 should be used to specify only the specified amount of depth, while (S1+3) is used to specify depth 2 for the same item, and (S1+4) is used to specify depth 3. S1+2: Route No. of relay destination in depth 1: H01 to H08 Unit No.
Page 622 High−level Instructions In this example, the control data beginning with DT10 (depth 3 → 6 words) should be specified as shown below. To send the 5 words of data → DT10 = H0005 CPU1 Route 1 DT11=H8103 CPU2 No.2 DT12=H0203 CPU2 Route 3 CPU3...
Page 623 High−level Instructions Additional information concerning the F145 (SEND) instruction Sending the special data registers and special internal relays using the data transfer instruction Special data registers and special internal relays cannot be sent using the F145 (SEND) instruction. Use a program like that shown below to send these types of data.
Page 624 High−level Instructions FPΣ/FP−X/FP0R F146 (RECV) Availability Data receive FP0R P146 (For MEWTOCOL master mode) FP−X: Ver 1.2 or more (PRECV) FPΣ: 32k Outline Receives specified data from the serial port of another PLC or computer to the unit. Program example Boolean Ladder Diagram Ladder Diagram...
Page 625 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item The control data specified by [S1][S1+1] is specified as follows. [S1]: Specifying transmission unit and transmission method [S1]: Word unit Specifies No. of transmisson words transmission H001 to H1FD (1 to 509 words): when transmitting to Group A H001 to H1B (1 to 27 words): when transmitting to Group B FPΣ, FP−X, FP0R, FP2, Group A...
Page 626 High−level Instructions FPΣ/FP−X/FP0R Flag conditions Σ Error flag (R9007) : Turns on and stays on when Σ Error flag (R9008) : Turns on for an instant when − The control data of [S1] and [S1+1] is a value outside of the specified range.
Page 627 High−level Instructions FPΣ/FP−X/FP0R For information on the contents of error codes, refer to the manual. If the error code is H73, a communication time−out error has occurred. The time−out time can be changed within a range of 10.0 ms to 81.9 seconds (in units of 2.5 ms), using the setting of system register 32.
Page 628 High−level Instructions FPΣ/FP−X/FP0R F146 (RECV) Data receive Availability P146 (For MODBUS master mode) FP0R/FP−X (PRECV) FPΣ: 32k Outline Receives specified data from the serial port of another PLC or computer to the unit. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 629 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item The control data specified by [S1][S1+1] is specified as follows. [S1]: Specifying transmission unit and transmission method [S1]: Word unit Specifies No. of transmisson words (H001 to H07F) transmission *According to the restrictions on the MODBUS protocol. H0 fixed [S1]: Bit No.
Page 630 High−level Instructions FPΣ/FP−X/FP0R Explanation of command Command 01 (Y, R coil read) send Example) When the 1 bit of Y17 is readed from the unit No. 17 of the remote unit, and a command to transmit the readed bit data to the 5th bit of the DT100 in the local unit is sent from the COM1. [ F146 (RECV), DT10, WY0, K1, DT100 ] DT10 H0 fixed...
Page 631 High−level Instructions FPΣ/FP−X/FP0R Command 02 (X contact read) send Example) When the 1 bit of X17 is readed from the unit No. 17 of the remote unit, and a command to transmit the readed bit data to the 5th bit of DT100 in the local unit is sent. [ F146 (RECV), DT10, WX0, K1, DT100 ] H0 fixed DT10...
Page 632 High−level Instructions FPΣ/FP−X/FP0R Command 03 (DT read) send Example) When the 6 words of data from DT500 to DT505 is readed from the unit No. 17 of the remote unit, and a command data to the area starting with DT100 in the local unit is sent from the COM1. [ F146 (RECV), DT10, DT0, K500, DT100 ] DT10 [S1]:...
Page 633 High−level Instructions FPΣ/FP−X/FP0R Example) When the 6 words of data from LD100 to LD105 is readed from the unit No. 17 of the remote unit, and a command data to the area starting with DT100 in the local unit is sent from the COM1. [ F146 (RECV), DT10, LD0, K100, DT100 ] DT10 [S1]:...
Page 634 High−level Instructions FPΣ/FP−X/FP0R The SEND instruction only requests that the data be sent, but the actual processing takes place when the ED instruction is executed. The SEND/RECV execution end flag (R9045: COM1/R904B: COM2) can be used to check whether or not the transmission has been completed.
Page 635 High−level Instructions FPΣ/FP−X/FP0R Availability Data receive FP0R F146 (MODBUS master mode II: Type (RECV) FP−X: Ver. 2.50 directly specifying MODBUS address) FPΣ: Ver. 3.20 Outline Receives specified data from the serial port of another PLC or computer to the unit. Feature: Data can be transmitted with this instruction only.
Page 636 High−level Instructions FPΣ/FP−X/FP0R Specifications for each item [S1]: Specifying port number, transmission command and destination unit number H1 or H2 H1 H2 H3 H4 [S1]: Selects COM Specifies Unit No. (H01 to HFF) port transmission command (1) Specifying COM port Specify H1 for COM 1 port, and H2 for COM2 port.
Page 637 High−level Instructions FPΣ/FP−X/FP0R Example) When 64 bits (4 words) are read from the bit address H7788 of the unit No. 17 connected to the COM1 and written in the bit 0 of DT100 of the local unit. [ F146(RECV), H1111,H7788, K64, DT100 ] [S1]: Selects COM port Unit No.
Page 638 High−level Instructions FPΣ/FP−X/FP0R Command 03 (Holding register read) Example) When 6 words are read from the address H7788 of the unit No. 17 connected to the COM1 and written in the area starting with DT100 in the local unit. [ F146(RECV), H1311,H7788, K6, DT100 ] [S1]: Selects COM port Unit No.
Page 639 High−level Instructions FPΣ/FP−X/FP0R Precautions during programming It is not possible to execute multiple F145 (SEND) instructions and F146 (RECV) instructions for the same communication port simultaneously. The program should be set up so that these instructions are executed when the SEND/RECV execution flag (R9044: COM1/R904A: COM2) is on.
Page 640 High−level Instructions F146 (RECV) Data receive (MEWNET link) P146 (PRECV) Outline Receives data from another station through link units in the network. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F146 (RECV) F146 RECV, DT10 , DT 0 , K 100 , DT50 Starting 16-bit area for storing control data Type of source operands for storing data in the remote station.
Page 641 High−level Instructions Example of bit unit reception When the control data is as follows: DT10(S1)=H850D Bit unit Bit No. 13 of remote station’s memory area Bit No. 5 of local station’s memory area DT11(S1+1)=H010A Unit No.10 Route No.1 the on and off information of Bit No. 13 of DT100 of the unit No. 10 connected to route No. 1 is sent to Bit No.
Page 642 High−level Instructions Specifying the various items Control data (S1) Specifying the remote station Specify the remote station by means of a route number and unit number. The setting is entered differently depending on whether the remote station is a PLC in the same network, or a PLC in a network on a different hierarchical level.
Page 643 High−level Instructions (1) Specifying word unit reception If word unit reception is being used, the data for the specified number of words is sent from the memory area of the remote station specified by S2 and N, and is stored in the memory area of the local station that starts with D.
Page 644 High−level Instructions Sending data from a PLC on a different hierarchical level What is a hierarchical link? A hierarchical link functions as a relay station between two link units installed on the same backplane, enabling communication between CPUs belonging to different networks. Example: Communicating with a CPU at depth 1 Local...
Page 645 High−level Instructions Example: Communicating with a CPU at depth 3 (reception from CPU5 to CPU1) Depth 0 Depth 1 Depth 2 Depth 3 The numbers CPU1 to CPU5 have been temporarily assigned, for the purpose of indicating the relay order of the hierarchical links.
Page 646 High−level Instructions (1) Specifying word unit reception If word unit reception is being used, the data for the specified number of words is sent from the memory area of the remote station specified by S2 and N, and is stored in the memory area of the local station beginning with D.
Page 647 High−level Instructions Specifying the relay station S+1 should be used to specify only the specified amount of depth, while (S1+3) is used to specify depth 2 for the same item, and (S1+4) is used to specify depth 3. S1+2: Route No. of relay destination in depth 1: H01 to H08 Unit No.
Page 648 High−level Instructions In this example, the control data beginning with DT10 (depth 3 → 6 words) should be specified as shown below. To receive the 5 words of data → DT10 = H0005 CPU1 Route 1 DT11=H8103 CPU2 No.2 DT12=H0203 CPU2 Route 3 CPU3...
Page 649 High−level Instructions Additional information concerning the F146 (RECV) instruction Receiving the special data registers and special internal relays using the data transfer instruction Special data registers and special internal relays cannot be transferred using the F146 (RECV) instruction. Use a program like that shown below to receive these types of data. Receiving special data registers in the FP2 , FP2SH or FP10SH (source issuing the command: FP2/FP2SH/FP10SH) F146 RECV, S, DT90000, Kn, DT0...
Page 650 High−level Instructions F147 (PR) Printout Outline Outputs ASCII codes to the printer (for transistor output type only). Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (DF ) R 9033 F147 PR , DT 0 , WY 0 F147 (PR) R9033 Printout flag...
Page 651 High−level Instructions Explanation of example The ASCII codes stored in data registers DT0 to DT5 are output through word external output relay WY0 when trigger R10 turns on. Source: ASCII code for 12 character A, B, C, D, E, F, G, H, I and J Data register 0D 0A 4A ASCII HEX code...
Page 652 High−level Instructions Precautions during programming Multiple F147 (PR) instructions cannot be executed at the same time. The program should be set up so that the printout flag (R9033) is used during execution of F147 (PR) instruction to inhibit simultaneous execution. The ASCII code conversion instruction [F95 (ASC)] can be used to convert character constants (M) to ASCII codes.
Page 653 High−level Instructions Time chart ASCII HEX code (Y0 to Y7) Signal of output unit Strobe signal (Y8) R9033 F147 (PR) instruction execution Number of scans 0 1 2 3 4 5 6 7 8 9 1011 121314151617 323334353637 Using printer output during 8−point output When only eight output points are being used, connections should be made as shown below, and the program should be set up so that the strobe signal is output from Y7.
Page 654 High−level Instructions F148 (ERR) Self-diagnostic error set P148 (PERR) Outline Sets the specified condition as a self-diagnostic error. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P148 (PERR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Self−diagnostic error set Trigger F148...
Page 655 High−level Instructions Description Along with self−diagnostic error codes specified by n being stored in the special data register DT9000 on DT90000, the self−diagnostic error flag (R9000) is turned on. Also, for FP0/FP−e/FP0R/FPΣ/FP−X, the ERROR/ALARM on the control unit blinks and for FP2/FP2SH/FP10SH, ERROR LED on the CPU lights. The specified value “n”...
Page 656 High−level Instructions F149 (MSG) Message display P149 (PMSG) Outline Displays the message “specified character constant” on the programming tool. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P149 (PMSG)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F149...
Page 657 High−level Instructions Specifying Slot Numbers With the FPΣ The slot numbers of target intelligent unit are allocated automatically, based on the installation position. Number being specified Expansion unit Intelligent unit With the FP2 and FP2SH The slot numbers of the target intelligent unit are allocated automatically, based on the installation position.
Page 658 High−level Instructions With the FP3 and FP10SH The slot numbers of the target intelligent unit are allocated automatically, based on the installation position. Slot numbers are allocated in the order of the board number. With 3−slot and 5−slot boards, slot numbers are specified in the same way as with 8−slot boards.
Page 659 High−level Instructions F150 (READ) Data read from intelligent unit P150 (PREAD) Outline Reads data from the shared memory in an intelligent unit. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F150 (READ) F150 READ, H 3, K 19, K 4, DT 0 16-bit equivalent constant for specifying the bank number in the shared memory of the intelligent unit.
Page 660 High−level Instructions Explanation of example Reads four words of data stored in the addresses starting from K19 to K22 of the intelligent unit shared memory (located in slot 3) and stores them in data registers DT0 to DT3 of CPU when trigger R10 turns on. (Slot No.) Intelligent unit 4 words...
Page 661 High−level Instructions Specifying S1 Intelligent unit without bank Specify the slot number in which the target intelligent unit has been installed. Upper byte Lower byte Slot No.: H00 to H1F Intelligent unit with bank Specify the slot number (H constant) in which the target intelligent unit has been installed, and the bank number (H constant).
Page 662 High−level Instructions F151 (WRT) Data write into intelligent unit P151 (PWRT) Outline Writes data into the shared memory in an intelligent unit. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F151 (WRT) F151 WRT, H 0, DT 10, K 5, K 0 16-bit equivalent constant for specifying the bank number in the shared memory of the intelligent unit.
Page 663 High−level Instructions Explanation of example Five words of data stored in data registers DT10 to DT14 of CPU are written into the addresses starting from K0 to K4 of the intelligent unit shared memory (located in slot 0) when trigger R10 turns on. (Slot No.) Intelligent unit 5 words...
Page 664 High−level Instructions Specifying S1 Intelligent unit without bank Specify the slot number in which the target intelligent unit has been installed. Upper byte Lower byte Slot No.: H00 to H1F Intelligent unit with bank Specify the slot number (H constant) in which the target intelligent unit has been installed, and the bank number (H constant).
Page 665 High−level Instructions F152 (RMRD) Data read from MEWNET-F slave station P152 (PRMRD) Outline Reads data from the specified intelligent unit of the MEWNET-F slave station Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F152 (RMRD) F152 RMRD, DT 0, K 0, K 10, DT 10 Lower 16-bit area of two 16-bit areas for storing control data for F152 (RMRD)/P152 (PRMRD) 16-bit equivalent constant or 16-bit area for specifying starting shared memory...
Page 666 High−level Instructions Explanation of example Ten words of data stored at address 0 to 9 in the shared memory of the intelligent unit of the slave station specified by DT0 and DT1 are read and the read data stored in data registers DT10 to DT19 of the master station “CPU”...
Page 667 High−level Instructions Specifying control data (S1+1 and S1) Specify the master station number and the slave station number with S1, and the slot number of the target intelligent unit with S1+1. Intelligent unit without bank Upper byte Lower byte Slave station No.H01 to H20 (1 to 32) Master station No.
Page 668 High−level Instructions Precautions during programming It is not possible to execute multiple F152 (RMRD) instructions and F153 (RMWT) instructions at the same time. The program should be set up so that these instructions are executed when the F152 (RMRD)/F153 (RMWT) instruction execution enabled flag (R9035) is on.
Page 669 High−level Instructions F153 (RMWT) Data write into MEWNET-F slave station P153 (PRMWT) Outline Writes data into the specified intelligent unit of the MEWNET-F slave station. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F153 (RMWT) F153 RMWT, DT 0, DT 250, K 20, K 500 Lower 16-bit area of two 16-bit areas for storing control data of F153 (RMWT)/P153 (PRMWT) Starting 16-bit area for storing data transferred to the shared memory...
Page 670 High−level Instructions Explanation of example Twenty words of data stored in data registers DT250 to DT269 of the master station “CPU” are written into the shared memory of the intelligent unit of slave station starting from address 500 to 519 specified by DT0 and DT1 when R10 turns on.
Page 671 High−level Instructions Specifying control data (S1+1 and S1) Specify the master station number and the slave station number with S1, and the memory of the target intelligent unit with S1+1. Intelligent unit without bank Upper byte Lower byte Slave station No.: H01 to H20 (1 to 32) Master station No.: H01 to H04 (1 to 4) Upper byte Lower byte...
Page 672 High−level Instructions Precautions during programming It is not possible to execute multiple F152 (RMRD) instructions and F153 (RMWT) instructions at one time. The program should be set up so that these instructions are executed when the F152 (RMRD)/F153 (RMWT) instruction execution enabled flag (R9035) is on. R9035 0: Execution inhibited (RMRD/RMWT instruction being executed) 1: Execution enabled...
Page 673 High−level Instructions F155 (SMPL) Availability Sampling start FP2/FP2SH/FP10SH P155 FP−X (V2.00 or more) (PSMPL) FPΣ (V3.10 or more)/FP0R Outline Starts sampling data which is preset in trace memory. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F155 (SMPL) F155 SMPL Explanation of example When the execution condition (trigger) R10 turns on, sampling of a relay (contact) and register registered in...
Page 674 High−level Instructions Sampling traces This is a function which samples the on/off status of the registered relay and the data stored in the register, either periodically or when the appropriate conditions have been fulfilled, and stores the results in memory. It can be used to confirm changes in the data.
Page 675 High−level Instructions F156 (STRG) Availability Sampling stop FP2/FP2SH/FP10SH P156 FP−X (V2.00 or more) (PSTRG) FPΣ (V3.10 or more)/FP0R Outline Stops sampling data. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F156 (STRG) F156 STRG Explanation of example When the execution condition (trigger) R10 turns on, a sampling trace stop command trigger is applied. Sampling Delay times Stop command trigger...
Page 676 High−level Instructions Sampling traces This is a function which samples the on/off status of the registered relay and the data stored in the register, either periodically or when the appropriate conditions have been fulfilled, and stores the results in memory. It can be used to confirm changes in the data.
Page 677 High−level Instructions F157 (CADD) Time addition P157 (PCADD) Outline Adds specified time data (hours, minutes, and seconds) to date (years, months, and days) and clock (hours, minutes, and seconds) data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P157 (PCADD)” is not available. Program example Boolean Ladder Diagram...
Page 678 High−level Instructions Explanation of example Adds the time data stored in data registers DT11 and DT10 to the clock/calendar data stored in special data registers DT9054 to DT9056 (DT90054 to DT90056) when trigger R0 turns on. The result is stored in data registers DT32, DT31, and DT30.
Page 679 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The data specified by S1 and S2 is not BCD data. −...
Page 680 High−level Instructions F158 (CSUB) Time substruction P158 (PCSUB) Outline Subtracts specified time data (hours, minutes, and seconds) from date (years, months, and days) and clock (hours, minutes, and seconds) data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P158 (PCSUB)” is not available. Program example Boolean Ladder Diagram...
Page 681 High−level Instructions Explanation of example Subtracts the time data stored in data registers DT11 and DT10 from the date/clock data stored in data registers DT9054 to DT9056/ DT90054 to DT90056) when trigger R0 turns on. The result is stored in data registers DT32, DT31, and DT30.
Page 682 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The data specified by S1 and S2 is not BCD data. −...
Page 683 High−level Instructions Usage example: Computing the elapsed time The elapsed time can be computed using the F158 (CSUB) instruction. Using the calendar timer, store the starting time and ending time in the data memory, and compute the elapsed time between the two values. An example in which operation was stopped at 08:02:15 and resumed at 10:30:25 will be used to show how the time that operation was stopped is computed.
Page 684 High−level Instructions FPΣ/FP−X/FP0R Availability F159 (MTRN) Serial data communication FPΣ/FP−X/FP0R Outline This is used to send data to or receive data from an external device through the specified RS232C port. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F159 (MTRN) F159 MTRN, DT 100, K 8, K 1...
Page 685 High−level Instructions FPΣ/FP−X/FP0R Description This instruction is used to send and receive instructions and data when an external device (computer, measuring instrument, bar code reader, etc.) has been connected to the specified RS232C port. 1) Transmission Transmits “n” bytes of the data stored in the data table that begins from the starting area specified in “S” through the communication port specified in “D”...
Page 686 High−level Instructions FPΣ/FP−X/FP0R Programming and operation during transmission To execute transmission, write the data to be transmitted to the data table and specify with an F158(MTRN) instruction. Use an F0(MV) or F95(ASO) instruction to write the data to be transmitted to the transmission data storage area specified in “S”.
Page 687 High−level Instructions FPΣ/FP−X/FP0R Program Specify the starting address of the transmission data table in “S”, and the number of data bytes to be transmitted in “n”. Write the transmission F1 DMV, H44434241, DT101 data to the data table. F1 DMV, H48474645, DT103 Transmit the data in F159 MTRN, DT100, K 8, K 1 the data table.
Page 688 High−level Instructions FPΣ/FP−X/FP0R Preparation for reception Setting of COM 1 port reception buffer No. 416 and No. 417 The area of data registers DT0 up to DT2047 is the default reception buffer. The maximum number of bytes that can be received is 4094 bytes. No.
Page 689 High−level Instructions FPΣ/FP−X/FP0R Programming and operation during reception Data sent from an external device connected to the RS232C port is stored in the data registers that have been set as the reception buffer. Data registers are used for the reception buffer. Specify the data registers in system registers 416 to 419. The number of bytes of data received is stored in the starting address of the reception buffer.
Page 690 High−level Instructions FPΣ/FP−X/FP0R Table of related flags and system registers Item For COM1 For COM2 For Tool Transmission mode flag R9032 R9042 R9040 Reception done flag R9038 R9048 R903E Transmission done flag R9039 R9049 R903F Beginning of reception Specified in 416 Specified in 418 Specified in 420 buffer...
Page 691 High−level Instructions FPΣ/FP−X/FP0R Notes To perform repeated reception of data, refer to the following steps. 1) Receive data 2) Reception done (R9038/R9048: on, reception prohibited) 3) Process received data 4) Execute F159(MTRN) instruction (R9038/R9048: off, reception possible) 5) Receive subsequent data The reception done flag (R9038/R9048) also changes during scanning.
Page 692 High−level Instructions FP2/FP2SH F159 (MTRN) Serial data communication Availability (for MCU COM port) P159 (PMTRN) FP2/FP2SH Outline Data is transmitted to external equipment via the COM port of the specified MCU. This function is available from FP2/FP2SH Ver. 1.50 or later. Program example Boolean Ladder Diagram...
Page 693 High−level Instructions FP2/FP2SH Description 1) It is used to transmit commands or data to the COM port (COM1 or COM2) of the specified MCU unit connecting with external equipment (such as PC, measuring insrument, barcode reader). Note: The operation mode of the communication port of the MCU should be set to the general−purpose serial communication mode.
Page 694 High−level Instructions FP2/FP2SH 9) The communication parameter data consists of 11 words. 1) Unit number setting value (K1 to K99) 2) Baud rate setting value (K0 to K10) *2 *2. Baud rate setting value Storage value Baud rate 1200 2400 4800 9600 19200...
Page 695 High−level Instructions FP2/FP2SH Flag conditions ・Error flag (R9007) (R9008): − It turns on, when the specified address using the index modifier exceeds a limit. − It turns on, when the MCU unit does not exist in the slot No. specified by [D]. −...
Page 696 High−level Instructions FP2/FP2SH F161 (MRCV) Serial data reception Availability P161 (for MCU COM port) (PMRCV) FP2/FP2SH Outline Data is received from external equipment via the COM port of the specified MCU. This function is available from FP2/FP2SH Ver. 1.50 or later. Program example Boolean Ladder Diagram...
Page 697 High−level Instructions FP2/FP2SH Description 1) It is used to receive commands or data for the COM port (COM1 or COM2) of the specified MCU unit connecting with external equipment (such as PC, measuring insrument, barcode reader). Note: The operation mode of the communication port of the MCU should be set to the general−purpose communication mode.
Page 698 High−level Instructions FP2/FP2SH If nine or more data should be received, the MCU unit detects the received buffer full error. If the received buffer FULL error is detected, the MCU unit prohibits the reception of data in that channel and inform about the error. The byte number which can be received in one buffer is maximum of 2048 bytes (including terminal code).
Page 699 High−level Instructions F160 (DSQR) 32-bit data square root P160 (PDSQR) Outline Takes the square root of the specified 32-bit data. For the FP0R, FPΣ and FP−X, the P type high−level instruction “P160 (PDSQR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 700 High−level Instructions Description The square root of 32-bit data specified by S1 is calculated and stored in the 32-bit area specified by D. In the result, the digits beyond the decimal point are disregarded. √(S+1, S) → (D+1, D) Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008):...
Page 701 High−level Instructions FP0/FPΣ/FP−X/FP0R Availability (MV) High−speed counter control FP0/FP0R/FPΣ/FP−X Outline This instruction is used to perform control such as software reset, counter disabling, and high−speed counter instruction clearing. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV) F0 MV , H 1, DT9052 or DT90052 9052 (MV) F0 MV , H 0, DT9052 or DT90052...
Page 702 High−level Instructions FP0/FPΣ/FP−X/FP0R Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area is exceeded when an index modifier is used − The “S” is outside specification range Using the FP0/FP−e High−speed counter and Pulse output controls flag area Four bits are allocated to each high−speed counter channel for use as the control code write area DT9052...
Page 703 High−level Instructions FP0/FPΣ/FP−X/FP0R Program example Example: Software reset of channel 0 of high−speed counter. F0 MV, H4, DT9052 F0 MV, H0, DT9052 Using the FPΣ High−speed counter and Pulse output controls flag area The area DT90052 for writing channels and control codes is allocated as shown below. The control code written by the F0 (MV) instruction is stored in the control code monitor area while it is written in the special register DT90052.
Page 704 High−level Instructions FP0/FPΣ/FP−X/FP0R Program example Example 1: Software reset of channel 0 of high−speed counter F0 MV, H1, DT90052 F0 MV, H0, DT90052 Example 2: Software reset of channel 2 of high−speed counter F0 MV, H2001, DT90052 F0 MV, H2000, DT90052 Using the FP−X High−speed counter and Pulse output controls flag area The area DT90052 for writing channels and control codes is allocated as shown below.
Page 705 High−level Instructions FP0/FPΣ/FP−X/FP0R Program example Example 1: Software reset of channel 0 of high−speed counter F0 MV, H1, DT90052 F0 MV, H0, DT90052 Example 2: Software reset of channel 1 of high−speed counter F0 MV, H1001, DT90052 F0 MV, H1000, DT90052 Note: FP−X Ry type At the reset input setting, you set whether the reset input (X2 or X5) of the pulse I/O cassette, which was assigned by the system register high−speed counter setting, will be enabled or disabled.
Page 706 High−level Instructions FP0/FPΣ/FP−X/FP0R High−speed counter control for FP0R, FPΣ and FP−X Channel No. Control code monitor area FPΣ FP−X Ry type FP−X Tr type FP0R DT90190 DT90360 DT90370 DT90370 DT90191 DT90361 DT90371 DT90371 DT90192 DT90362 DT90372 DT90372 DT90193 DT90363 DT90373 DT90373 —...
Page 707 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Availability (MV) Pulse output control FP0/FP0R/FP−e/ FPΣ/FP−X Outline This instruction is used to perform control such as software reset, counter disabling, and stopping pulse output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger (MV) F0 MV , H 1, DT9052 or DT90052 9052 (MV) F0 MV , H 0, DT9052 or DT90052...
Page 708 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area is exceeded when an index modifier is used − The “S” is outside specification range Using the FP0/FP−e High−speed counter and Pulse output controls flag area Four bits are allocated to each Pulse output channel for use as the control code write area DT9052 (DT90052...
Page 709 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Program example Example 1: Software reset of channel 0 of Pulse output. F0 MV, H1, DT9052 F0 MV, H0, DT9052 Example 2: Enable near home input during pulse output control and change to deceleration. F0 MV, H4, DT9052 F0 MV, H0, DT9052 Using the FPΣ...
Page 710 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Program example Example 1: Software reset of Pulse output (ch0) F0 MV, H1, DT90052 F0 MV, H0, DT90052 (ch2) F0 MV, H2001, DT90052 F0 MV, H2000, DT90052 Example 2: Enable near home input during pulse output control and change to deceleration.
Page 711 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Using the FP−X High−speed counter and Pulse output controls flag area The area DT90052 for writing channels and control codes is allocated as shown below. The control code written by the F0 (MV) instruction is stored in the control code monitor area while it is written in the special register DT90052.
Page 712 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Example 2: Enable near home input during pulse output control and change to deceleration. (ch0) F0 MV, H110, DT90052 F0 MV, H100, DT90052 (ch1) F0 MV, H1110, DT90052 F0 MV, H1100, DT90052 Using the FP0R High−speed counter and Pulse output controls flag area The area DT90052 for writing channels and control codes is allocated as shown below.
Page 713 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Availability Writing and reading the high−speed counter and pulse output elapsed (DMV) FP0/FP0R/FP−e/ FPΣ/FP−X value Outline This instruction is used to write and read the elapsed value of the high−speed counter/pulse output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 714 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Writing the elapsed value This instruction writes the 32−bit data specified in “S” to the elapsed value area of the high−speed counter and pulse output channel being used, and simultaneously sets the data in the elapsed value area of the high−speed counter used inside the system.
Page 715 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Program examples The elapsed value area varies depending on the model and channel number. Example 1: On R0 input, the value in data register DT4 is set in the ch0 elapsed value area as the set value. F1 DMV, DT4, DT9044 Decrement input Value in DT4...
Page 716 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R Table of channel number and elapsed value area For FP0/FP−e High−speed counter Pulse output Elapsed value area channel no. channel no. DT9044 to DT9045 DT9048 to DT9049 − DT9104 to DT9105 − DT9108 to DT9109 For FP0(T32) High−speed counter Pulse output Elapsed value area...
Page 717 High−level Instructions FP0/FP−e/FPΣ/FP−X/FP0R For FP−X Tr type High−speed counter Pulse output Elapsed value area channel no. channel no. − DT90300 to DT90301 − DT90304 to DT90305 − DT90308 to DT90309 − DT90312 to DT90313 − DT90316 to DT90317 − DT90320 to DT90321 −...
Page 718 High−level Instructions FP0R Availability F165 Cam control (CAM0) FP0R (High−speed counter control) Outline This instruction enables the control according to the maximum of 31−point target values for the high−speed counter. [Feature] An interrupt program can be also executed wheneber the elapsed value reaches each target value.
Page 719 High−level Instructions FP0R To perform the control with the maximum target value, positive integer numbers must be specified for all the target position data. [When the maximum value control is performed] Using the maximum target value of data table or hardware/software reset signal enables the value to return to the starting address of data table.
Page 720 High−level Instructions FP0R Precautions during programming To use this instruction, the high−speed counter function must be used. The high−speed counter control flag (R9110 to R9115) corresponding to the specified channel turns on when the execution condition of F165(CAM0) instruction turns on until the cam control is cleared. When the high−speed counter control flag (R9110 to R9115) is on, the high−speed counter control instructions (F166(HC1S), F167(HC1R), F178(PLSM)) to the high−speed counter of the same channel cannot be executed.
Page 721 High−level Instructions FP0R *1: Specification of high−speed counter channel Specify the channel of the high−speed counter/pulse output with H constant in the starting area (2 words) of the data table. H 0 0 0 0 0 0 0 1 <Specification of the channel of high−speed counter/pulse output> Allowable range for specifying the high−speed counter: 0 to 5 Specification of maximum value control:0 = Not control with the maximum target value 1 = Control with the maximum target value...
Page 722 High−level Instructions FP0R Example of setting 1 [Condition] (1) Target values: 4 points Position output from R10 (2) Each taget value is as the table below. Position output Target value 1 (R11) 2000 2 (R12) 4000 3 (R13) 8000 4 (R14) 10000 (3) The maximum value is 14000 pulses.
Page 723 High−level Instructions FP0R Explanation of program operation When adding + subtracting elapsed values with the maximum target value When the internal relay R3 is on, the operation is as follows. Elapsed value of high−speed counter Max. target value K14000 K10000 K8000 K4000 K2000...
Page 724 High−level Instructions FP0R Explanation of program operation When adding + subtracting elapsed values with the maximum target value and interrupt control, the operation will be performed as below if the following conditions are met; Elapsed value when the instruction is executed: K−4000 <...
Page 725 High−level Instructions Availability Target value match on F166 (HC1S) FP0/FP0R/FP−e/ (with channel specification) FPΣ/FP−X Outline When the elapsed value of the specified channel of the high−speed counter matches the target value, the specified output is turned on. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 726 High−level Instructions High−speed counter control flag varies FP0, FPΣ, FP−e R903A FP−X, FP0R R9110 (Refer to next page) The number of the high−speed counter control flag varies depending on the channel used. Regarding the channel number and control flag for each model, refer to the table on the next page. Description The number specified in “S”...
Page 727 High−level Instructions FP0/FP−e/FPΣ/FP−X Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area is exceeded when an index modifier is used. − The “n” is outside specification range. −...
Page 728 High−level Instructions FP0R Availability F166 Target value match on (HC1S) FP0R (High−speed counter control) Outline When the elapsed value of the specified channel of the high−speed counter (HSC) matches the target value, the specified output is turned Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 729 High−level Instructions FP0R Possible specification range for “Yn”: Devices specified for the match ON/OFF output Type Device area However, for the device that is not implemented, only the memory turns ON/OFF. FP0R Y0 to Y1F Example of target value match on setting When specifying the high−speed counter Condition (1) Specify the high−speed counter channle number 0.
Page 730 High−level Instructions FP0R FP0R <In case of high−speed counter> Channel No. Control flag Elapsed value area Target value area Interrupt program R9110 DT90300 to DT90301 DT90302 to DT90303 INT0 R9111 DT90304 to DT90305 DT90306 to DT90307 INT1 R9112 DT90308 to DT90309 DT90310 to DT90311 INT3 R9113...
Page 731 High−level Instructions FP0R Availability F166 Target value match on (HC1S) FP0R (Pulse output control) When the elapsed value of the specified pulse output channel matches Outline the target value, the specified output is turned on. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 732 High−level Instructions FP0R Example of target value match on setting When specifying the pulse output Condition (1) Specify the pulse output channle number 0. (2) Set the targe value to 10000. (3) Set the output coil to be turned off when the values match to Y2. ( DF ) F166 HC1S, H100, K10000, Y2 Pulse output control start...
Page 733 High−level Instructions FP0R FP0R <In case of pulse output> For pulse output For pulse output control Channel Channel Pulse output Elapsed Target Control Target Interrupt instruction flag value area value area flag value area program DT90404 to DT90400 to DT90402 to R9120 R9130 INT8...
Page 734 High−level Instructions Availability F167 Target value match off (HC1R) FP0/FP0R/FP−e/ (with channel specification) FPΣ/FP−X Outline When the elapsed value of the specified channel of the high−speed counter matches the target value, the specified output is turned off. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 735 High−level Instructions High−speed counter control flag varies FP0, FPΣ, FP−e R903A FP−X, FP0R R9110 (Refer to next page) The number of the high−speed counter control flag varies depending on the channel used. Regarding the channel number and control flag for each model, refer to the table on the next page. Description The number specified in “S”...
Page 736 High−level Instructions FP0/FP−e/FPΣ/FP−X Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area is exceeded when an index modifier is used. − The “n” is outside specification range. −...
Page 737 High−level Instructions FP0R Availability F167 Target value match off (HC1R) FP0R (High−speed counter control) Outline When the elapsed value of the specified channel of the high−speed counter (HSC) matches the target value, the specified output is turned off. Program example Boolean Ladder Diagram Ladder Diagram...
Page 738 High−level Instructions FP0R Possible specification range for “Yn”: Devices specified for the match ON/OFF output Type Device area However, for the device that is not implemented, only the memory turns ON/OFF. FP0R Y0 to Y1F Example of target value match OFF setting When specifying the high−speed counter Condition (1) Specify the high−speed counter channle number 0.
Page 739 High−level Instructions FP0R FP0R <In case of high−speed counter> Channel No. Control flag Elapsed value area Target value area Interrupt program R9110 DT90300 to DT90301 DT90302 to DT90303 INT0 R9111 DT90304 to DT90305 DT90306 to DT90307 INT1 R9112 DT90308 to DT90309 DT90310 to DT90311 INT3 R9113...
Page 740 High−level Instructions FP0R Availability F167 Target value match off (HC1R) FP0R (Pulse output control) Outline When the elapsed value of the specified pulse output channel matches the target value, the specified output is turned off. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 741 High−level Instructions FP0R Example of target value match OFF setting When specifying the pulse output Condition (1) Specify the pulse output channle number 0. (2) Set the targe value to 10000. (3) Set the output coil to be turned off when the values match to Y2. Pulse output control start ( DF ) F167 HC1R, H100, K10000, Y2...
Page 742 High−level Instructions FP0R FP0R <In case of pulse output> For pulse output For pulse output control Channel Channel Pulse instruction Elapsed Target Control Target Interrupt in execution value area value area flag value area program DT90404 to DT90400 to DT90402 to R9120 R9130 INT8...
Page 743 High−level Instructions FP0/FP−e Availability F168 Positioning control (SPD1) FP0/FP−e (trapezoidal control) Outline Outputs a pulse from the specified output (Y0 or Y1) according to the specified parameter. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F168 (SPD1) F168 SPD1 , DT100 , K 0 Starting address for the area that contains the data table.
Page 744 High−level Instructions FP0/FP−e Description of operating mode Incremental <relative value control> Outputs the pulses set with the target value. Operation mode Control code: H02 Control code: H03 Elapsed value Target Forward off/Reverse on Forward on/Reverse off value Pulse output on direction Pulse output on direction Positive Addition...
Page 745 High−level Instructions FP0/FP−e (*1): Specify the control code by setting the constant H. H □ □ □ Pulse width specification 0: Duty 50% 1: Fixed pulse width (approx. 80µs) Note: A specification of 2 or higher will result in 0. The pulse width is the output value from the IC and the actual pulse width varies due to the delay in the response of photocoupler.
Page 746 High−level Instructions FP0/FP−e 2: For FP0 compatibility mode Pulses are output using a duty of 25% fixedly. (The setting is invalid.) The pulse output will start approx. 300us later after the direction output. (The characteristics of a motor driver is considered.) Application example F0 MV, H 2, DT 0 F0 MV, K1000, DT 1...
Page 747 High−level Instructions FP0/FP−e Availability F168 Positioning control (SPD1) FP0/FP−e (home position return) Outline Outputs a pulse from the specified output (Y0 or Y1) according to the specified parameter. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F168 (SPD1) F168 SPD1 , DT100 , K 0 Starting address for the area that contains the data table.
Page 748 High−level Instructions FP0/FP−e Description of operating mode Until the home input (X0 or X1) is entered, the pulse is continuously output. To decelerate the movement when near the home, set the bit corresponding to DT9052 to off → on → off → with the near home input. During operation, the elapsed value area and set value area will become insufficient.
Page 749 High−level Instructions FP0/FP−e (*1): Specify the control code by setting the constant H. H □ □ □ Pulse width specification 0: Duty 50% 1: Fixed pulse width (approx. 80µs) Note: A specification of 2 or higher will result in 0. The pulse width is the output value from the IC and the actual pulse width varies due to the delay in the response of photocoupler.
Page 750 High−level Instructions FP0/FP−e 2: For FP0 compatibility mode Pulses are output using a duty of 25% fixedly. (The setting is invalid.) The pulse output will start approx. 300us later after the direction output. (The characteristics of a motor driver is considered.) Application example F0 MV, H 22, DT 0 F0 MV, K1000, DT 1...
Page 751 High−level Instructions FP0/FP−e Caution regarding pulse output function (F168 and F169) Use a program such as the following when performing continuous motor rotation in one direction. F1 DMV, K0, DT9044 Clear the elapsed value F0 MV, Incremental control F0 MV, K1000, Initial speed F0 MV,...
Page 752 High−level Instructions FP0/FP−e F169 Pulse output Availability (PLS) (with channel specification) FP0/FP−e (JOG operation) Outline Outputs the pulse of the specified parameter from the specified output (Y0 or Y1). Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F169 (PLS) F169 PLS , DT10 , K 0 Starting address for the area that contains the data table.
Page 753 High−level Instructions FP0/FP−e Data table settings Control code (*1) Frequency (Hz) K40 to K10000 (Hz) (*2) (*1): Specify the control code by setting the constant H. H □ □ □ Pulse width specification 0: Fixed pulse width (approx. 80µs) (CPU ver. 2.1 or later) 1 to 9: Duty ration approx.
Page 754 High−level Instructions FP0/FP−e 2: For FP0 compatibility mode Pulses are output using a duty of 25% fixedly. (The setting is invalid.) The pulse output will start approx. 300us later after the direction output. (The characteristics of a motor driver is considered.) Precautions during programming If both the regular program and the interrupt program contain code for the same channel, make sure both are not executed simultaneously.
Page 755 High−level Instructions FP0/FP−e Availability F170 PWM output (PWM) FP0/FP−e (with channel specification) Outline Outputs the PWM of the specified parameter from the specified output (Y0 or Y1). Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F170 (PWM) F170 PWM , DT20 , K 0 Starting address for the area that contains the data table.
Page 756 High−level Instructions FP0/FP−e Data table settings H0 to H16 (*1) Control code Duty (%) K1 to K999 (0.1% to 99.9%) (*1): Control code contents (frequency settings) FP0 compatibility mode of FP0R Setting Frequency (Hz) Period (ms) Frequency (Hz) Period (ms) 1000 1000 10.0...
Page 757 High−level Instructions FPΣ/FP−X Pulse output Availability F171 (with channel specification) (SPDH) FPΣ/FP−X (trapezoidal control) Outline This instruction outputs pulses from the specified channel for the pulse output according to the specified parameters. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F171...
Page 758 High−level Instructions FPΣ/FP−X The control code, initial speed, maximum speed, acceleration/deceleration time, and target value are specified by creating the data table “S” to “S+11” on the following page using the user program. The frequency is changed using the specified acceleration/deceleration time from the initial speed to the maximum speed.
Page 759 High−level Instructions FPΣ/FP−X Operation modes Incremental <relative value control> Outputs the pulses set with the target value. Selected PLS + SIGN PLS + SIGN mode Forward off Forward on CW/CCW Elapsed value Target Reverse on Reverse off value Pulse output Pulse output on Pulse output on Positive...
Page 760 High−level Instructions FPΣ/FP−X Setting the data table Fmax Output pulse number Fmin Acceleration time Deceleration time Control code (*1) Initial speed (*2) Fmin (Hz) Maximum speed (*2) Fmax (Hz) Acceleration/decele (*3) ration time t (ms) Target value (*4) (pulse number) S+10 S+11 (*1): Specification of control code (specify with H constant)
Page 761 High−level Instructions FPΣ/FP−X Application example F1 DMV, H1100, DT 0 F1 DMV, K1000, DT 2 F1 DMV, K7000, DT 4 F1 DMV, K300, DT 6 F1 DMV, K100000, DT 8 F1 DMV, K 0, DT 10 F171 SPDH, DT 0, K 0 (DF) 7kHz Output pulse...
Page 762 High−level Instructions FPΣ/FP−X Pulse output Availability F171 (SPDH) (with channel specification) FPΣ/FP−X (home position return) Outline This instruction outputs pulses from the specified channel for the pulse output according to the specified parameters. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 763 High−level Instructions FPΣ/FP−X For FP−X Tr type Channel no. Output Output method SIGN Y4 or Y8 Deviation counter clear SIGN Y5 or Y9 Deviation counter clear SIGN No deviation counter clear control SIGN No deviation counter clear control Note) There is no ch3 for C14T and C14TD. Note) C14T and C14TD is Y4 or Y5.
Page 764 High−level Instructions FPΣ/FP−X For FP−X Tr type Channel Control Elapsed value Near home Target value area flag area home input DT90348 DT90350 R911C R911C DT90349 DT90351 DT90352 DT90354 R911D R911D DT90353 DT90355 DT90052 DT90052 <bit4> DT90356 DT90358 R911E R911E DT90357 DT90359 DT90360 DT90362...
Page 765 High−level Instructions FPΣ/FP−X Setting the data table Control code (*1) Initial speed (*2) Fmin (Hz) Maximum speed (*2) Fmax (Hz) Acceleration/deceleration (*3) time t (ms) Deviation counter clear (*4) signal output time tr(ms) (*1): Control code specification (specify with an H constant) H □...
Page 766 High−level Instructions FPΣ/FP−X (*4): Deviation counter clear signal output time Set the deviation counter clear signal output time. 0.5 ms to 100 ms [K0 to K100] Set value and margin of error (0.5 ms or less) Specify K0 when not using this signal or when specifying 0.5 ms Application example F1 DMV, H1125, DT 0 F1 DMV, K1000, DT 2...
Page 767 High−level Instructions FPΣ/FP−X Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area is exceeded when an index modifier is used. − The “n” is outside specification range. −...
Page 768 High−level Instructions FP0R Availability F171 Pulse output (SPDH) (Trapezoidal control) FP0R Outline Outputs pulses from the specified pulse output channels according to the specified parameters. [Feature] An acceleration time and deceleration time can be set respectively. Also, the deceleration stop is available. The target speed can be changed.
Page 769 High−level Instructions FP0R The pulse output frequency can be changed by rewriting the target speed during the pulse output. Two control methods are avialable, which are type 0 and type 1. Using the type 0, the speed can be changed within the range of the target speed specified first.
Page 770 High−level Instructions FP0R Pules output channels and areas used Pulse Correction Acceleration Elapsed Targe Deceleration output speed of forbidden Channel Output Output type value value minimum instruction initial area starting area area speed flag speed position DT90400 DT90400 DT90402 DT90402 DT90408 DT90408 R9120...
Page 771 High−level Instructions FP0R Change of speed during pulse output (1)With the type 0, if a value larger than the target speed at start−up is specified, it will be corrected to the target speed at start−up. With the type 1, if the target value is set to a value larger than 50kHz, it will be corrected to 50kHz.
Page 772 High−level Instructions FP0R [Explanation of pulse output operation] Pulses are output using a duty of 25% fixedly. When using the PLS +SIGN method, pulses will be output approx. 300 us later after the output of direction signal. (The characteristics of a motor driver is considered.) Sample program1: Trapezoidal control type 0, No deceleration stop request, No change of speed Frequency...
Page 773 High−level Instructions FP0R Data table Refer to the Sample program1. Sample program3: Trapezoidal control type 0, with change of speed Frequency ( DF ) F1 DMV, H10000000, DT0 7kHz F1 DMV, K1000, DT2 5kHz Output pulse F1 DMV, K7000, DT4 number F1 DMV, K450, DT8 100,000...
Page 774 High−level Instructions FP0R Sample program4: Trapezoidal control type 1, with change of speed Frequency ( DF ) F1 DMV, H10010000, DT0 50kHz F1 DMV, K1000, DT2 Output pulse F1 DMV, K25000, DT4 25kHz number F1 DMV, K600, DT8 100,000 1kHz F1 DMV, K400, DT6 Time 200ms...
Page 775 High−level Instructions FP0R Availability F171 Pulse output (SPDH) (JOG positioning type 0) FP0R Outline Outpus the specified number of pulses and performs the deceleration stops after the position control starting input during the pulse output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 776 High−level Instructions FP0R Image of operation: When the target speed does not change Frequency Target speed Target value Initial speed Time Position Deceleration Acceleratrion control time starting Flag input Position control starting input Pulse output instruction flag Image of operation: When the target speed changes Frequency Target speed Target...
Page 777 High−level Instructions FP0R Pulse output channels and areas used Position Pulse Correction Acceleration Target Deceleration Channel control output Elapsed speed of forbidden Output Output type value minimum starting instruction value area initial area starting area speed flag speed position input DT90400 DT90400 DT90402...
Page 778 High−level Instructions FP0R Assignment of control code (Specify with H constant) 10: Fixed When the target value has been set to 0, it will stop when the position control starting input turns on. Control assignment 1: JOG positioning (Only V1.06 or later) For reversing the output when the target value has been set Control assignment 2 0: Type 0...
Page 779 High−level Instructions FP0R Flag conditions ・Error flag (R9007): ・Error flag (R9008): − Turns on when the area specified using the index modifier exceeds the limit. − Turns on when n is out of the specified range. − Turns on when each data of [S,S+1] to [S+4,S+5] is out of the specified range.
Page 780 High−level Instructions FP0R Availability F171 Pulse output (SPDH) (JOG positioning type 1) FP0R Outputs the specified number of pulses changing the target speed Outline again and performs the deceleration stop after the position control starting input during the pulse output. Program example Boolean Ladder Diagram...
Page 781 High−level Instructions FP0R The initial speed may be corrected to enable accelerating/decelerating within the specified time. Frequency Target speed 2 Target value Target speed 1 Initial speed Time Acceleratrion Change time Deceleration time Flag Position control starting input Note) Note that the position control starting input will be disregarded even if it is turned on during acceleration. Precautions during programming When the same channel is described in a normal program and interrupt program both, do not execute them at the same time.
Page 782 High−level Instructions FP0R Setting the data table Control code Initial speed (Hz) Velocity range (Frequency) (Hz) Velocity range (Frequency) (Hz) 1Hz to 50kHz [K1 to K50000 (Unit: Hz)] Target speed 1 (Hz) Acceleration time Acceleration/deceleration time range (ms) (ms) K1 to K32760 (Unit: ms) Target speed 2 Velocity range (Frequency) (Hz) (Hz)
Page 783 High−level Instructions FP0R Assignment of control code (Specify with H constant) 10: Fixed Control assignment 1: JOG positioning Control assignment 2 1: Type 1 Interrupt execution assignment *As for the output assignment 0: Execute in main program. 1: Execute in interrupt program. When starting the instruction with th setting of “1: Calcula- (The trigger is the level type.) tion only”, the pulse output is not performed.
Page 784 High−level Instructions FP0R Flag conditions ・Error flag (R9007): ・Error flag (R9008): − Turns on when the area specified using the index modifier exceeds the limit. − Turns on when n is out of the specified range. − Turns on when each data of [S,S+1] to [S+4,S+5] is out of the specified range.
Page 785 High−level Instructions FPΣ/FP−X Availability Pulse output F172 (with channel specification) (PLSH) FPΣ/FP−X (JOG operation) Outline Outputs the pulses of the specified parameter from the specified channel for the pulse output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F172 (PLSH) F172 PLSH, DT 10, K 0...
Page 786 High−level Instructions FPΣ/FP−X For FP−X Tr type Channel no. Output Output method SIGN SIGN SIGN SIGN Note) There is no ch3 for C14T and C14TD. Note) The pulse I/O cassette (AFPX−PLS) cannot be installed on the FP−X Tr type. Note) Use the ch2 and ch3 at up to 20 kHz. By specifying either addition counting or subtraction counting in the control code, this instruction can be used as an instruction for JOG operations.
Page 787 High−level Instructions FPΣ/FP−X Precautions during programming During the time that the circular interpolation control flag R904E is on, the pulse output instructions F166 to F176 cannot be executed. When using this instruction for FPΣ, the setting for the channels corresponding to system registers no. 400 and no.
Page 788 High−level Instructions FPΣ/FP−X Data table settings Mode with no target value Target value match stop mode Control code (*1) Control code (*1) Frequency Frequency (*2) (*2) Target value (*3) (*1): Control code specification (specify with an H constant) H □ □ □ □ □ □ □ □ 0: Fixed Target value setting 0: Mode with no target value...
Page 789 High−level Instructions FP0R Double word compare: Availability F172 Start equalPulse output (PLSH) FP0R (JOG operation type 0 and 1) Outline Performs the pulse output from the specified pulse output channels according to the specified parameters. [Feature] Acceleration time and deceleration time can be set individually.
Page 790 High−level Instructions FP0R Precautions during programming When the same channel is described in a normal program and interrupt program both, do not execute them at the same time. This instruction cannot be executed when the corresponding pulse output instruction flag to the channel started is on.
Page 791 High−level Instructions FP0R (3) For deceleration, the speed cannot be lower than the deceleration minimum speed. For information on the deceleration minimum speed, refer to the special registers. Assignment of control code (Specify with H constant) 10: Fixed Control assignment 0: JOG Control assignment 2 0: Type 0 (Without target values)
Page 792 High−level Instructions FP0R Absolute <Absolute value control> The pulse that is the difference between the specified target value and the current value is output. Mode selection PLS+SIGN PLS+SIGN CW/CCW Elapsed value Forward OFF Forward ON Reverse ON Reverse OFF Target value When target value is Pulse output when Pulse output when...
Page 793 High−level Instructions FPΣ/FP−X Availability F173 PWM output (PWMH) (with channel specification) FPΣ/FP−X/FP0R Outline Outputs the PWM of the specified parameter from the specified channel for the PWM output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F173 (PWMH) F173 PWMH, DT 20, K 0 Starting number for the area that contains the data table Channel targeted by the PWM output...
Page 794 High−level Instructions FPΣ/FP−X/FP0R For FP−X Ry type (AFPX−PLS) Channel no. Output Control flag Y100 R911C Cassete mounting part 1 Y200 R911D Cassete mounting part 2 For FP−X Tr Channel no. Output Control flag R911C R911D R911E R911F Note) There is no ch3 for FPX−C14T. Note) The pulse I/O cassette (AFPX−PLS) cannot be installed on the FP−X Tr type.
Page 795 High−level Instructions FPΣ/FP−X/FP0R Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The specified area is exceeded when an index is modified. − The n is any value other than 0 or 2. −...
Page 796 High−level Instructions FPΣ/FP−X/FP0R For FP0R Frequency (Hz) Period (ms) 166.67 133.33 12.5 80.00 40.00 20.00 10.00 5.00 2.50 1.67 1.25 1000 1.00 1200 0.83 1600 0.63 2000 0.50 3000 0.33 4800 0.21 Other than the above Cannot be specified 3 − 532 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 797 High−level Instructions FPΣ/FP−X Pulse output Availability F174 (with channel specification) (SP0H) FPΣ/FP−X (Selectable data table control operation) Outline Outputs the pulses from the specified channel for the pulse output according to the specified data table. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 798 High−level Instructions FPΣ/FP−X For FP−X Tr type Channel no. Output Output method SIGN SIGN SIGN SIGN Note) There is no ch3 for C14T and C14TD. Note) The pulse I/O cassette (AFPX−PLS) cannot be installed on the FP−X Tr type. Note) Use the ch2 and ch3 at up to 20 kHz. When the elapsed value of the high−speed counter reaches the target value specified in the data table, the pulse frequency is switched (interrupt processing is carried out).
Page 799 High−level Instructions FPΣ/FP−X Precautions during programming The high−speed counter control flag R903A (R903C) is on from the time that the execution condition for the F174 (SP0H) instruction has gone on until the pulse output stops. During the time that the high−speed counter control flag R903A (R903C) is on, the high−speed counter and pulse output instructions F166 to F176, which use the same control flag, cannot be executed.
Page 800 High−level Instructions FPΣ/FP−X Setting the data tabler Control code (*1) (*2) [S+2] Frequency 1 Target value 1 (*3) [S+4] (Number of pulses) [S+6] Frequency 2 Target value 2 [S+8] (Number of pulses) [S+2n] Frequency n Target value n [S+2(n+1)] (Number of pulses) End of table [S+2(n+2)] (Pulse output stops.)
Page 801 High−level Instructions FPΣ/FP−X Program example [Operation content] F174 Pulse output from the specified channel ch0 begins at 1,000 Hz when the (SP0H) instruction execution condition (trigger) R10 goes on. At the point when 1,000 pulses have been counted at a frequency of 1,000 Hz, the frequency switches to 2,500 Hz.
Page 802 High−level Instructions FP0R Availability F174 Pulse output (Arbitrary data (SP0H) table control operation) FP0R Outline Outputs pulses from the specified pulse output channels according to the specified data table. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction F174 SP0H , DT100 , K 0 F174 (SP0H) Starting 16−bit area for registering data tables...
Page 803 High−level Instructions FP0R Pules output channels and areas used Channel No. Output Output type Pulse output instruction flag Elapsed value area Target value area DT90400 DT90400 DT90402 DT90402 R9120 R9120 DT90401 DT90403 SIGN DT90410 DT90410 DT90412 DT90412 R9121 R9121 DT90411 DT90413 SIGN DT90420...
Page 804 High−level Instructions FP0R *1: Assignment of control code (Specify with H constant) 10: Fixed Control assignment 0: Arbitrary table control 000: Fixed Operation mode assignment 0: Incremental 1: Absolute Output type assignment 0: CW/CCW 1: PLS+SIGN (Forward OFF/Reverse ON) 1: PLS+SIGN (Forward ON/Reverse OFF) *2: Velocity range (Frequency) (Hz) <K constant>...
Page 805 High−level Instructions FP0R Setting and program Control assignment: Arbitrary table control, operation mode: Incremental, the output type is CW/CCW. Control code: “H10000000” F1 DMV,H 10000000,DT100 F1 DMV, K 1000, DT102 Frequency 1: 1000 Hz F1 DMV, K 1000, DT104 Target value 1: 1000 pulses Frequency 2: 2500 Hz F1 DMV, K 2500, DT106 Target value 2: 3000 pulses...
Page 806 High−level Instructions FPΣ/FP−X Availability F175 Pulse output (SPSH) FPΣ C32T2, C32T2H (Linear interpolation) C28P2, C28P2H/FP−X Outline Pulses are output from channel for 2 pulse output, in accordance with the parameters in the designated data table, so that the path to the target position forms a straight line.
Page 807 High−level Instructions FPΣ/FP−X The control code, initial speed, maximum speed, acceleration/deceleration time, and target value are specified by creating the data table “S” to “S+11” on the following page using the user program. If the frequency is set to 40 kHz or more, specify a duty of 1/4 (25%). If the frequency for ch2 or ch3 of FP−X Tr type is set to 10kHz or more, specify a duty of 1/4 (25%).
Page 808 High−level Instructions FPΣ/FP−X Precautions during programming Designate settings for the target value and movement distance so they are within the following range. −8,388,608 to +8,388,607 When using in combination with other positioning instructions like F171, designate so the target value is within the above range, even in those instructions.
Page 809 High−level Instructions FPΣ C32T2/FP−X Setting the data table Control code Control code (*1) (*1) [S+2] Composite speed (*2) Initial speed Fmin(Hz) S tti Setting area [S+4] Composite speed (*2) Maximum speed Fmax(Hz) Designated with [S+6] Acceleration/Deceleration time T (ms) (*3) user program user program [S+8]...
Page 810 High−level Instructions FPΣ C32T2/FP−X Note: Cautions regarding specification of composite speed (initial speed) The trajectory might not be linear if the initial composite speeds for CH0 and CH2 are not 1.5 Hz or higher in the formula below (when the formula below can’t be worked out). (∆x2+∆y2) ∆x ∆x: Short CH of distance between target and current value...
Page 811 High−level Instructions FPΣ C32T2/FP−X Example: With incremental, initial speed 300Hz, maximum speed 5kHz, acceleration/deceleration time 0.5s, CH0 target value 1000, CH2 target value 50 300 × 1000 = 299.626Hz CH0 component initial speed = (1000 + 50 300 × 50 = 14.981Hz CH2 component initial speed = (1000...
Page 812 High−level Instructions FP0R Availability F175 Pulse output (SPSH) (Linear interpolation) FP0R Outline Pulses area output from channel for 2 pulse output, in accordance with the parameters in the designated data table, so that the path to the target position forms a straight line. Program example Boolean Ladder Diagram...
Page 813 High−level Instructions FP0R Table of areas used FP0R Pulse output Pulse output Target value area Correction speed Elapsed value area Target value area channel No. instruction flag for match ON/OFF of initial speed DT90400 to DT90400 to DT90402 to DT90402 to DT90404 to DT90404 to R9120...
Page 814 High−level Instructions FP0R *1: Assignment of control code (Specify with H constant) 10: Fixed Control assignment 0: Interpolation *As for the output assignment Type When starting the instruction with th setting of “1: Calcula- 0: Linear interpolation tion only”, the pulse output is not performed. 0: Fixed When starting the instruction with the assignment of the Output assignment...
Page 815 High−level Instructions FP0R *2: Composite speed range (Initial speed, Maximum speed ) (Hz) <K constant> 6.0Hz to 50kHz [K6 to K50000] (However, 6.0 Hz is for an angle of 0 deg or 90 dge only. Also, specify K6 when specifying 6.0 Hz.) −...
Page 816 High−level Instructions FP0R Flag conditions ・Error flag (R9007): ・Error flag (R9008): − Turns on when the area is exceeded when an index modifier is used. − Turns on when the “n” is other than 0. − Turns on when the data “S, S+1 to S+!0, S+11” of data table are outside specification range.
Page 817 High−level Instructions FPΣ Availability Pulse output F176 (SPCH) (Circular interpolation) FPΣ C32T2, C32T2H C28P2, C28P2H Outline Pulses are output from channel ch0 and ch2, in accordance with the parameters in the designated data table, so that the path to the target position forms an circular.
Page 818 High−level Instructions FPΣ C32T2/FP−X Flag for circular interpolation R904E: Circular interpolation control flag Turns ON when circular interpolation instruction F176 starts up and maintains that state until the target value is reached. R904F: Set value change confirmation flag When conducting control with the continuous mode for performing continuous circular interpolation actions, use this after circular interpolation instruction startup when overwriting the next target value.
Page 819 High−level Instructions FPΣ C32T2/FP−X Setting the data table Pass position setting method Center position setting method Control code (*1) Control code (*1) Composite speed Composite speed (*2) (*2) (Frequency) Fv (Hz) (Frequency) Fv (Hz) Setting X−axis (CH0) X−axis (CH0) (*3) Setting area Target position...
Page 820 High−level Instructions FPΣ C32T2/FP−X (*3): Target position and pass position K−8388608 to K8388607 (*4): Operation connection mode Stop: When stop (0) is specified, it will stop when the target position is reached. Continue: When the following circular interpolation data table is overwritten when continue (1) is specified after circular interpolation action begins, the following circular interpolation begins when the first circular interpolation that was started up finishes (target position reached).
Page 821 High−level Instructions FP0R Availability F177 Pulse output (HOME) (Home return) FP0R Outline Performs the home return operation on the specified pulse output channels. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction F177 HOME , DT100 , K 2 F177 (HOME) Starting 16−bit area for registering data tables Channels intended for pulse output...
Page 822 High−level Instructions FP0R Table of areas used FP0R Deviation counter clear Pulse Pulse Near home Home Near home Home output output Elapsed Elapsed Target Target output output Output Output Output type Output type input input instruction value area value area channel No.
Page 823 High−level Instructions FP0R Assignment of control code (Specify with H constant) 10: Fixed Control assignment 0: Home return Control assignment type 0: Home return type 0 0: Home return type 1 00: Fixed Operation mode assignment 0: Forward 1: Reverse Output type assignment 0: CW/CCW 1: PLS+SIGN (Forward OFF/Reverse ON)
Page 824 High−level Instructions FP0R Precautions during programming Even in the state that the home input turns on, once this instruction is executed, the pulse output starts. If the near home input becomes effective during the acceleration, the deceleration operation will start. When the same channel is described in a normal program and interrupt program both, do not execute them at the same time.
Page 825 High−level Instructions FP0R Availability F178 (PLSM) Input pulse measurement FP0R Outline Measures the number of pulses and the pulse period of the specified high−speed counter channel when using the high−speed counter function. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction F178 (PLSM)
Page 826 High−level Instructions FP0R Specification of each item Specifying the channel number and number of moving average [S1] Specify the channel number of the high−speed counter and number of moving average. If necessary, specify the measurement of pulse period. Setting of measurement limit for measuring period in 1ms unit 0: No measurement limit process 1:100ms 2:200ms...
Page 827 High−level Instructions FP0R A maximum of approx. 174.7 ms can be measured in 1us unit. A maximum of approx. 49.7 days can be measured in 1ms unit. Period measurement data When measurement starts, −1 is set. When measurement limit is exceeded, −1 is set. Precautions during programming The same channel cannot be specified at the same time with other high−speed counter control instructions <F165(CAM0), F166(HC1S), F167(HC1R)>.
Page 828 High−level Instructions FP0R Flag conditions ・Error flag (R9007): ・Error flag (R9008): − Turns on when the area specified using the index modifier exceeds the limit. − [S1] Turns on when the specified channel is out of the specified range. − [S1] Turns on when the number of moving average is out of the specified range.
Page 829 High−level Instructions FP–e Availability F180 (SCR) FP−e screen display registration FP−e Outline Instruction to register the screen displayed in the N mode and S mode. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F180 (SCR) F180 SCR, H0, DT 10, DT100, DT 101 FP−e screen mode and number (Specify between 0 and 3.) Starting address of area specified for the FP−e display method Area for storing data to be displayed in the upper of the FP−e...
Page 830 High−level Instructions FP–e Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − The area specified using the index modifier exceeds the limit. − The value of S1 or S2 exceeds the limit of specified range. How to specify S1 Specify the type of FP−e mode.
Page 831 High−level Instructions FP–e S2+1: Second word Specifies the method for displaying data in the upper. The bits shown in the figure below are allocated. Please specify with the H constant. S2+2: Third word Specifies the method for displaying data in the lower. The bits shown in the figure below are allocated.
Page 832 High−level Instructions FP–e Availability F181 (DSP) FP−e screen display switching FP−e Outline Specify the screen to be displayed on the FP−e. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F181 (DSP) F181 DSP, DT 0 FP−e screen mode and number (Specify between 0 and 7.) Operands Index Relay...
Page 833 High−level Instructions FP–e Availability FP−X V2.0 or more F182 (FILTR) FPΣ V3.10 or more Time constant processing FP0R Outline The filter processing is executed for the specified bits and the bitwise results are output. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 834 High−level Instructions FP–e Precautions during programming When the system detects a leading edge of the trigger, all the bits of the input specified by S1 is unconditionally output. Max. 1 scan time error in the filter processing time occurs occasionally. Explanation of example The changes in values of R0 or X0 to XF, when the conditions prior to the execution of this instruction (R0=0) are as below, are explained with a time chart.
Page 835 High−level Instructions F183 (DSTM) Auxiliary timer (32-bit ) Outline Sets the 32−bit ON−delay timer for 0.01 s units (0.01 to 21474836.47 s) Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F183 (DSTM) F183 DSTM , DT10 , DT 5 32-bit equivalent constant or lower 16-bit area of 32−bit data for timer set value 16-bit area for timer elapsed value Operands...
Page 836 High−level Instructions Timer set time The timer setting is entered as a value of 0.01 x (timer set value). The timer set value is specified as a K constant within the range of K1 to K2147483647. The F183 (DSTM) is set between 0.01 and 21,474,836.47 seconds, in units of 0.01 seconds. If the set value is K500, the set time will be 0.01 x 500 = 5 seconds.
Page 837 High−level Instructions If the values in the elapsed value area (D +1, D) reach (S + 1, S), relays being used are turned on by the OT instruction which comes next in the program. The special internal relay R900D also goes on at this point.
Page 838 High−level Instructions 3 − 574 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 839 High−level Instructions F190 (MV3) Three 16-bit data move P190 (PMV3) Outline Copies three 16-bit data to the specified 48-bit area (3 words). For the FP0R/FPΣ/FP−X, the P type high−level instruction “P190 (PMV3)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 840 High−level Instructions Explanation of example When trigger R0 turns on, − the contents of data register DT10 are copied to DT40. − the contents of data register DT20 are copied to DT41. − the contents of data register DT30 are copied to DT42. [S3]16 bits [S2]16 bits [S1]16 bits...
Page 841 High−level Instructions F191 (DMV3) Three 32-bit data move P191 (PDMV3) Outline Copies three 32-bit data to the specified 96-bit area (6 words). For the FP0R/FPΣ/FP−X, the P type high−level instruction “P191 (PDMV3)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 842 High−level Instructions Explanation of example When trigger R0 turns on, − the contents of deta register DT11 and DT10 are copied to data registers DT41 and DT40. − the contents of data register DT21 and DT20 are copied to DT43 and DT42. −...
Page 843 High−level Instructions F215 (DAND) 32-bit data AND P215 (PDAND) Outline Performs bit-wise AND operation on two 32-bit data items. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P215 (PDAND)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F215...
Page 844 High−level Instructions Description Performs AND operation on each bit in the 32-bit equivalent constant or 32-bit data specified by “S1+1 and S1” and “S2+1 and S2” when the trigger turns on. The AND operation result is stored in the 32-bit area specified by D.
Page 845 High−level Instructions F216 (DOR) 32-bit data OR P216 (PDOR) Outline Performs bit-wise OR operation on two 32-bit data items. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P216 (PDOR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F216...
Page 846 High−level Instructions Description Performs OR operation on each bit in the 32-bit equivalent constant or 32-bit data specified by “S1+1 and S1” and “S2+1 and S2” when the trigger turns on. The OR operation result is stored in the 32-bit area specified by Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier...
Page 847 High−level Instructions F217 (DXOR) 32-bit data XOR P217 (PDXOR) Outline Performs bit-wise exclusive OR operation on two 32-bit data items. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P217 (PDXOR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 848 High−level Instructions Description Performs exclusive OR operation on each bit in the 32-bit equivalent constant or 32-bit data specified by “S1+1 and S1” and “S2+1 and S2” when the trigger turns on. The exclusive OR operation result is stored in the 32-bit area specified by D.
Page 849 High−level Instructions F218 (DXNR) 32-bit data XNR P218 (PDXNR) Outline Performs bit-wise exclusive NOR operation on two 32-bit data items. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P218 (PDXNR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 850 High−level Instructions Description Performs exclusive NOR operation on each bit in the 32-bit equivalent constant or 32-bit data specified by “S1+1 and S1” and “S2+1 and S2” when the trigger turns on. The exclusive NOR operation result is stored in the 32-bit area specified by D.
Page 851 High−level Instructions F219 (DUNI) 32-bit data unites P219 (PDUNI) Outline Unites two 32-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P219 (PDUNI)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F219 (DUNI) F219 DUNI, DT10, DT20, DT30, DT40 32-bit equivalent constant or lower 16-bit area of 32-bit data 32-bit equivalent constant or lower 16-bit area of 32-bit data Lower 16-bit area of 32-bit data which stores master data for combination or...
Page 852 High−level Instructions Explanation of example [S1+1, S1]: HCCCCAAAA [S2+1, S2]:H33335555 [DT10] [DT20] [DT11] [DT21] Inverted [S3+1, S3]:HF0F0F00F [S3+1, S3]:H0F0F0FF0 [DT30] [Inverted DT30] [DT31] [Inverted DT31] HC0C0A00A H03030550 [D+1, D]:HC3C3A55A [DT40] [DT41] Description The two groups of double word data specified by “S1+1 and S1” and “S2+1 and S2” are combined by bit unit processing using the master data specified by “S3+1 and S3”...
Page 853 High−level Instructions FP2/FP2SH/FP−X F230 (TMSEC) Availability Time data second conversion P230 FP2/FP2SH/FP−X (PTMSEC) FPΣ 32k/FP0R Outline The specified time data (a date and time) is changed into the number of seconds. With FP2/FP2SH, this function is available from Ver. 1.50 or later. Program example Boolean Ladder Diagram...
Page 854 High−level Instructions Description Conversion to the number of seconds from standard time *1 is performed for the input time data [S ~ S+2], and a conversion result is stored in [D, D+1] by the 32−bit binary. The conversion is in consideration of the leap year. 1 minute −−−...
Page 855 High−level Instructions FP2/FP2SH/FP−X F231 (SECTM) Availability Second time data conversion P231 FP2/FP2SH/FP−X (PSECTM) FPΣ 32k/FP0R Outline The specified number of seconds is changed into time data (a date and time). With FP2/FP2SH, this function is available from Ver. 1.50 or later. Program example Boolean Ladder Diagram...
Page 856 High−level Instructions Description The input number of seconds (S) is converted to the time data based on standard time *1, and stored in (D). The conversion is in consideration of the leap year. 1 minute −−− 60 seconds 1 hour −−−...
Page 857 High−level Instructions F235 (GRY) 16-bit data → Gray code P235 (PGRY) Outline Converts 16-bit data to gray code. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P235 (PGRY)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F235 (GRY)
Page 858 High−level Instructions F236 (DGRY) 32-bit data → Gray code P236 (PDGRY) Outline Converts 32-bit binary data to gray code. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P236 (PDGRY)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F236...
Page 859 High−level Instructions F237 (GBIN) 16-bit Gray code → 16-bit binary data P237 (PGBIN) Outline Converts 16-bit gray code to 16-bit binary data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P237 (PGBIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 860 High−level Instructions F238 (DGBIN) 32-bit Gray code → 32-bit binary data P238 (PDGBIN) Outline Converts gray code to 32-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P238 (PDGBIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 861 High−level Instructions Binary/Hexadecimal/BCD/Gray Code Expressions Decimal Binary data Gray code 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0001 0000 0000 0000 0010 0000 0000 0000 0011 0000 0000 0000 0011 0000 0000 0000 0010 0000 0000 0000 0100 0000 0000 0000 0110 0000 0000 0000 0101...
Page 862 High−level Instructions 3 − 598 Phone: 800.894.0412 - Fax: 888.723.4773 - Web: www.clrwtr.com - Email: info@clrwtr.com...
Page 863 High−level Instructions F240 (COLM) Bit line to bit column conversion P240 (PCOLM) Outline Converts a selected bit line to a bit column. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P240 (PCOLM)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 864 High−level Instructions Explanation of example When the specified bit position n = 10 1 0 1 0 0 0 1 D+10 D+11 D+12 D+13 D+14 D+15 Description The bit data at the position specified by “n” of the 16-word data area with the head address D is rewritten using the 16-bit data of the area specified by S.
Page 865 High−level Instructions F241 (LINE) Bit column to bit line conversion P241 (PLINE) Outline Converts a specified bit column to a bit line. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P241 (PLINE)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 866 High−level Instructions Explanation of example When the specified bit position n = 10 S+10 S+11 S+12 S+13 S+14 S+15 1 0 1 0 0 0 1 Description Reads the bit data at the position specified by “n” from the area specified by S and stores it in the area specified by D.
Page 867 High−level Instructions FPΣ/FP−X/FP0R Availability F250 (BTOA) Binary ASCII conversion FP−X/FPΣ 32k/FP0R Outline Converts 16−bit/32−bit binary data to ASCII code. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F250(BTOA) 16−D F250 BTOA, 16−D, DT10, DT20, DT100 Control string Starting 16−bit area for storing binary data Conversion method Starting 16−bit area for storing ASCII codes of converted result Operands...
Page 868 High−level Instructions FPΣ/FP−X/FP0R Specifying the conversion method [N] Example of converting 16−bit data (K1234 and K56) to decimal ASCII codes ( DF ) F251 ATOB, F250 BTOA, D−16, DT 10, DT20, DT100 16−D, S2 , H 214 , Notes About the digit number of ASCII data •...
Page 869 High−level Instructions FPΣ/FP−X/FP0R About normal direction and reverse direction (only when converting to hexadecimal ASCII data) Conversion examples Converts 16−bit data (K1234 and K56) to decimal ASCII codes. DT10 = K 1234 ”1234__56” DT11 = K 56 When No. of converted data is “2”, Starting position for storing is “0”, Size of the area for storing is “4”. ( DF ) F251 ATOB, F250 BTOA,...
Page 870 High−level Instructions FPΣ/FP−X/FP0R Converts 32−bit data (K1234 and K56789) to decimal ASCII codes. DT10、11 = K 1234 ”___1234__56789” DT12、13 = K 56789st When No. of converted data is “2”, Starting position for storing is “1”, Size of the area for storing is “7”. ( DF ) F251 ATOB, F250 BTOA,...
Page 871 High−level Instructions FPΣ/FP−X/FP0R Converts 32−bit data (H00000123 and H0089ABCD) to hexadecimal ASCII codes (Normal direction) DT10、11 = H 123 ”230100CDAB89” DT12、13 = H 89ABCD When No. of converted data is ”2”, Starting position for storing is ”0”, Size of the area for storing is ”6”. ( DF ) F251 ATOB, F250 BTOA,...
Page 872 High−level Instructions FPΣ/FP−X/FP0R Availability F251 (ATOB) ASCII Binary conversion FP−X/FPΣ 32k/FP0R Outline Converts ASCII code to 16−bit/32−bit binary data. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F251(ATOB) D−16 F251 ATOB, D−16, DT10, DT20, DT100 Control string Starting 16−bit area for storing ASCII codes Conversion method Starting 16−bit area for storing binary data of converted result Operands...
Page 873 High−level Instructions FPΣ/FP−X/FP0R Specifying the conversion method [N] Example of converting the ASCII data string ”123456789012” to decimal 3 digits x 4 data ( DF ) F251 ATOB, F251 ATOB, D−16, DT 10, DT20, DT100 D−16, S2 , H 413 , When converting by the above program: About normal direction and reverse direction The conversions in the normal direction and reverse direction are available for hexadecimal ASCII data.
Page 874 High−level Instructions FPΣ/FP−X/FP0R Conversion examples Examples of converting to decimal 3 digits x 4 data (when no comma ”,” exists) Converts to 16−bit data. ”123456789012” DT100 = K 123 DT100 = K 456 DT102 = K 789 DT103 = K 12 When No.
Page 875 High−level Instructions FPΣ/FP−X/FP0R Example of converting to decimal number x 4 data (in case of comma−deliminated “,” data) ”12,345,6789,0,” DT100 = K 12 DT101 = K 345 * The last of character strings is a comma. DT102 = K 6789 DT103 = K 0 When No.
Page 876: Operation Errors
High−level Instructions FPΣ/FP−X/FP0R Particular examples If there is numeric data larger than the specified digit number between commas. (Example: Decimal number x 4, the digit number of the numeric data is 4) ”1234,567890,12,345” K 1234 K 5678 The overflowed numbers become one numeric data. K 90 K 12 It is ignored.
Page 877 High−level Instructions FPΣ/FP−X/FP0R Availability F252 FP−X (V2.00 or more) (ACHK) ASCII data check FPΣ 32k/FP0R Outline Checks whether the specified ASCII data is correct or not. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction F252(ACHK) F252 ACHK, D−16 , DT 10, DT20 D−16 R900B R 900B...
Page 878 High−level Instructions FPΣ/FP−X/FP0R Flag conditions Σ Error flag (R9007): Turns on and stays on when Σ Error flag (R9008): Turns on for an instant when − There is an error in the control string specified by S1. − The direction of converted data is changed to the normal direction when the conversion format specified by S1 is in decimal.
Page 879 High−level Instructions Overview of Character String Instructions F257 (SCMP) to F265 (SREP) Configuration of character string instruction data tables Data tables for character strings show the character string size, the number of characters, and the character data. Max. number of characters that can be stored Character string size No.
Page 880 High−level Instructions How data tables are set Specify the values for the character string size and number of characters. The F0 (MV) instruction is used to specify values. Specify the characters. The F95 (ASC) instruction is used to specify characters. Example: The example shows (character string size “16 characters”, “no specification of characters”) for DT0.
Page 881 High−level Instructions F257 (SCMP) Comparing character strings P257 (PSCMP) Outline These instructions compare two specified character strings and output the judgment results to a special internal relay. With the FP0R/FPΣ/FP−X, the differential execution type instruction P257 (PSCMP) cannot be specified. Program example Boolean Ladder Diagram...
Page 882 High−level Instructions Description The character string specified for “S1” is compared to that specified for S2, and the judgment result is output to special internal relays R9009 to R900C (judgment flags for comparison instructions). R9009 to R900C are assigned based on whether “S1” or “S2” is larger, as shown in the table below. Relationship Flag of S1 and S2...
Page 883 High−level Instructions F258 (SADD) Character string coupling P258 (PSADD) Outline These instructions couple one character string with another. With the FP0R/FPΣ/FP−X, the differential execution type instruction P258 (PSADD) cannot be specified. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F258 (SADD)
Page 884 High−level Instructions Description The character string specified for “S1” is coupled to that specified for “S2”, and the result is stored in the character string specified by “D”. At the starting address of the area for storing results “D”, designate the character string size using the user program.
Page 885 High−level Instructions F259 (LEN) Number of characters in a character string P259 (PLEN) Outline These instructions determine the number of characters in a character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P259 (PLEN) cannot be specified. Program example Boolean Ladder Diagram Ladder Diagram...
Page 886 High−level Instructions Explanation of example “A” “B” “C” “D” DT100 “E” “1” “3” “2” Higher Lower 16 bits 16 bits Description The number of characters in the character string specified by “S” is determined, and the result is stored in “D”. Precautions during programming If the number of characters is larger than the character size string, an operation error occurs.
Page 887 High−level Instructions F260 (SSRC) Search for character string P260 (PSSRC) Outline These instructions search for a specified character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P260 (PSSRC) cannot be specified. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F260...
Page 888 High−level Instructions Explanation of example The DT0 character is searched from the character string of DT10, and the result is stored in DT120. Characters for search Table of found characters DT10 (Character string size) (Character string size) DT11 (Number of characters) (Number of characters) “F”...
Page 889 High−level Instructions F261 (RIGHT) Retrieving data from character strings (right side) P261 (PRIGHT) Outline These instructions retrieve a specified number of characters from the right side of the character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P261 (PRIGHT) cannot be specified.
Page 890 High−level Instructions Explanation of example A character is retrieved from the end of the character string of DT0, and is sent to DT20. Designate with the user program DT20 DT21 “D” “A” “E” “B” DT22 “C” “D” “2” “1” DT23 Area where operation results are stored “E”...
Page 891 High−level Instructions F262 (LEFT) Retrieving data from character strings (left side) P262 (PLEFT) Outline These instructions retrieve a specified number of characters from the left side of the character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P262 (PLEFT) cannot be specified.
Page 892 High−level Instructions Explanation of example A character is retrieved from the beginning of the character string of DT0, and is sent to DT20. Designate with the user program DT20 DT21 “A” “A” “B” “B” DT22 “C” “C” “D” “D” DT23 Area where operation results are stored “E”...
Page 893 High−level Instructions F263 (MIDR) Retrieving a character string from a character string P263 (PMIDR) Outline These instructions retrieve a character string consisting of a specified number of characters from the specified position in the character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P263 (PMIDR) cannot be specified.
Page 894 High−level Instructions Explanation of example Three characters are retrieved from the position byte 1 (second character) of the character string of DT0, and are sent to DT20. Designate with the user program DT20 DT21 “B” “A” “C” “B” DT22 “D” “C”...
Page 895 High−level Instructions F264 (MIDW) Writing a character string to a character string P264 (PMIDW) Outline These instructions write a specified number of characters from a character string to a specified position in the character string. With the FP0R/FPΣ/FP−X, the differential execution type instruction P264 (PMIDW) cannot be specified.
Page 896 High−level Instructions Explanation of example Three characters are retrieved from the character string of DT0, and are sent to the position byte 1 (second character) of the character string block of DT20. “A” “B” “C” “D” “E” “F” “H” “G” Designate with the user program DT20 DT21...
Page 897 High−level Instructions F265 (SREP) Replacing character strings P265 (PSREP) Outline These instructions replace a specified number of characters in a character string with the same number of different characters, starting from a specified position. With the FP0R/FPΣ/FP−X, the differential execution type instruction P265 (PSREP) cannot be specified.
Page 898 High−level Instructions Explanation of example The DT0 character string is replaced with the number of characters in DT1 (5 characters) from byte p=1 in DT20. In this case, n=3 characters of the data stored in the source are deleted in the replacement. “A”...
Page 899 High−level Instructions F270 (MAX) Maximum value search in 16-bit data table P270 (PMAX) Outline Searches for a maximum value in a table of 16-bit areas. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P270 (PMAX)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 900 High−level Instructions Precaution during programming Even if D+1 overflows the selected area, it will still be stored, and this may corrupt the data in the leading part of the other area. (An area overflow check is not performed.) Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008):...
Page 901 High−level Instructions F271 (DMAX) Maximum value search in 32-bit data table P271 (PDMAX) Outline Searches for a maximum value in a table of 32-bit areas. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P271 (PDMAX)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 902 High−level Instructions If S2 specifies a higher word of double word data, processing will take place over the same area as if the lower word had been specified. Double word data table Lower word Lower word Maximum value Higher word Higher word S1+1: D+1:...
Page 903 High−level Instructions F272 (MIN) Minimum value search in 16-bit data table P272 (PMIN) Outline Searches for a minimum value in a table of 16-bit areas. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P272 (PMIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 904 High−level Instructions Precaution during programming Even if D+1 overflows the selected area, it will still be stored, and this may corrupt the data in the leading part of the other area. (An area overflow check is not performed.) Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008):...
Page 905 High−level Instructions F273 (DMIN) Minimum value search in 32-bit data table P273 (PDMIN) Outline Searches for a minimum value in a table of 32-bit areas. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P273 (PDMIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 906 High−level Instructions If S2 specifies a higher word of double word data, processing will take place over the same area as if the lower word had been specified. Double word data table Lower word Lower word Minimum value Higher word Higher word S1+1: D+1:...
Page 907 High−level Instructions F275 (MEAN) Total and mean numbers calculation in 16-bit data table P275 (PMEAN) Outline Calculates the total and mean numbers in the specified word data table. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P275 (PMEAN)” is not available. Program example Boolean Ladder Diagram...
Page 908 High−level Instructions Precaution during programming Even if D+2 overflows the selected area, it will still be stored, and this may corrupt the data in the leading part of the other area. (An area overflow check is not performed.) Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008):...
Page 909 High−level Instructions F276 (DMEAN) Total and mean numbers calculation in 32-bit data table P276 (PDMEAN) Outline Calculates the total and mean numbers in the specified double word data table. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P276 (PDMEAN)” is not available. Program example Boolean Ladder Diagram...
Page 910 High−level Instructions If S2 specifies a higher word of double word data, processing will take place over the same area as if the lower word had been specified. Double word data table Lower word Higher word S1+1: S1+2: S1+3: Specified areas Lower word S2−1: Higher word...
Page 911 High−level Instructions F277 (SORT) Sort data in 16-bit data table P277 (in smaller or larger number order) (PSORT) Outline Sorts a string of data words. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P277 (PSORT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 912 High−level Instructions Description The data words (signed) from the area specified by S1 to the area specified by S2 are sorted in ascending order (the smallest word is first) or descending order (the largest word is first) depending on the condition set with S3.
Page 913 High−level Instructions F278 (DSORT) Sort data in 32-bit data table P278 (in smaller or larger number order) (PDSORT) Outline Sorts a string of data double words. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P278 (PDSORT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 914 High−level Instructions Description The double data words (signed) from the area specified by S1 to the area specified by S2 are sorted in ascending order (the smallest word is first) or descending order (the largest word is first) depending on the condition set with S3.
Page 915 High−level Instructions F282 (SCAL) Scaling of 16−bit data P282 (PSCAL) Outline The output value Y is found for the input value X by performing scaling for the given data table. With the FP0R/FPΣ/FP−X, the differential execution type instruction P282 (PSCAL) cannot be specified.
Page 916 High−level Instructions Description The output value for the input value X is found by performing scaling according to the data table, where the 16−bit data designated in “S1” is designated in “S2”. The number “n” of items in the data table is determined by the value “n” designated for the head “S2” of the data table.
Page 917 High−level Instructions F283 (DSCAL) Scaling of 32−bit data P283 (PDSCAL) Outline The output value Y is found for the input value X by performing scaling for the given data table. With the FP0R/FPΣ/FP−X, the differential execution type instruction P283 (PDSCAL) cannot be specified.
Page 918 High−level Instructions Description The output value for the input value X is found by performing scaling according to the data table, where the 32−bit data designated in “S1” is designated in “S2”. The number “n” of items in the data table is determined by the value “n” designated for the head “S2” of the data table.
Page 919 High−level Instructions FP–e Availability FP−X V2.0 or more F284 (RAMP) FPΣ V3.10 or more Inclination output of 16−bit data FP0R Outline Executes the linear output according to the elapsed time from the start by performing scaling with the output initial value, target value and time range.
Page 920 High−level Instructions FP–e Explanation of example When specifying each value as below by the program: Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008): Turns on for an instant when: − the area specified using the index modifier exceeds the limit. −...
Page 921 High−level Instructions F285 (LIMT) 16-bit data upper and lower limit control P285 (PLIMT) Outline This instruction carries out upper and lower limit control for 16-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P285 (PLIMT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 922 High−level Instructions Description The 16-bit output value stored in the area specified by D is controlled based on whether or not the 16-bit input value specified by S3 falls within the range bounded by the upper and lower limits set in S2 and S1. The output value is determined based on the following conditions: −...
Page 923 High−level Instructions F286 (DLIMT) 32-bit data upper and lower limit control P286 (PDLIMT) Outline This instruction carries out upper and lower limit control for 32-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P286 (PDLIMT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 924 High−level Instructions Description The output value (double words data) stored in the area specified by D is controlled based on whether or not the input value (double words data) specified by S3 falls within the range bounded by the upper and lower limits set in S2 and S1.
Page 925 High−level Instructions F287 (BAND) 16-bit data deadband control P287 (PBAND) Outline This instruction carries out dead-band control for 16-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P287 (PBAND)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 926 High−level Instructions Description The output value (word data) stored in the area specified by D is controlled based on whether or not the input value (word data) specified by S3 falls within the dead-band bounded by the upper and lower limits set in S1 and S2.
Page 927 High−level Instructions F288 (DBAND) 32-bit data deadband control P288 (PDBAND) Outline This instruction carries out dead-band control for 32-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P288 (PDBAND)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 928 High−level Instructions Description The output value (double word data) stored in the area specified by D is controlled based on whether or not the input value (double word data) specified by S3 falls within the dead-band bounded by the upper and lower limits set in S1 and S2.
Page 929 High−level Instructions F289 (ZONE) 16-bit data zone control P289 (PZONE) Outline This instruction carries out zone control for 16-bit data. For the FP0R/FPΣ/FP−X, the P type high−level instruction “P289 (PZONE)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 930 High−level Instructions Description The bias value specified by S1 or S2 is added to the input value (word data) specified by S3, and the output value is stored in the area specified by D. The output value is determined by the following conditions: When the input value S3 is less than zero, the input value S3 plus the negative bias value S1 is stored in D as the output value.
Page 931 High−level Instructions F290 (DZONE) 32-bit data zone control P290 (PDZONE) Outline This instruction carries out zone control for 32-bit data. (double words) For the FP0R/FPΣ/FP−X, the P type high−level Instruction “P290 (PDZONE)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 932 High−level Instructions Description The bias value specified by S1 or S2 is added to the input value (double word data) specified by S3, and the output value is stored in the area specified by D. The output value is determined by the following conditions: When the input value S3+1 and S3 are less than zero, the input value S3+1 and S3 plus the negative bias value S1+1 and S1 are stored in D+1 and D as the output value.
Page 933 High−level Instructions F300 (BSIN) BCD type Sine operation P300 (PBSIN) Outline Triangle functions, calculates trigonometric functions and the sine [SIN( )] of BCD code angular data, and stores it as BCD. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F300 (BSIN)
Page 934 High−level Instructions Description The SIN([S]) of an angle data (units are degrees) specified by S is calculated and the result stored in the 3-word area beginning at D. SIN[S] → [D] [D+1]. [D+2] D: Sign D+1: Integer value D+2: Decimal Select a BCD value for S within the range 0°...
Page 935 High−level Instructions F301 (BCOS) BCD type Cosine operation P301 (PBCOS) Outline Triangle functions, calculates trigonometric functions and the cosine [COS ( )] of BCD code angular data, and stores it as BCD. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F301...
Page 936 High−level Instructions Description The COS([S]) of an angle data (units are degrees) specified by S is calculated and the result stored in the 3-word area beginning at D. COS[S] → [D] [D+1]. [D+2] D: Sign D+1: Integer value D+2: Decimal Select a BCD value for S within the range 0°...
Page 937 High−level Instructions F302 (BTAN) BCD type Tangent operation P302 (PBTAN) Outline Triangle functions, calculates trigonometric functions and the tangent [TAN ( )] of BCD code angular data, and stores it as BCD. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F302...
Page 938 High−level Instructions Description The TAN([S]) of an angle data (units are degrees) specified by S is calculated and the result stored in the 3-word area beginning at D. TAN[S] → [D] [D+1]. [D+2] D: Sign D+1: Integer value D+2: Decimal Select a BCD value for S within the range 0°...
Page 939 High−level Instructions F303 (BASIN) BCD type Arcsine operation P303 (PBASIN) −1 Outline Triangle functions, This instruction calculates arcsine [SIN ( )]. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F303 (BASIN) F303 BASIN, DT20, DT10 Starting 16-bit area where angle data is stored or angle data (3 words) Area where calculated result is stored Operands Index...
Page 940 High−level Instructions Description −1 (the arcsine) of the value specified in S, S+1, and S+2 is calculated, and the result (an angle) is stored in D. −1 ([S] [S+1]. [S+2]) → [D] S: Sign S+1: Integer value S+2: Decimal Set 0 for the sign in S when the data to be processed is positive, and set 1 for the sign when the data is negative.
Page 941 High−level Instructions F304 (BACOS) BCD type Arccosine operation P304 (PBACOS) −1 Outline Triangle functions, This instruction calculates arccosine [COS ( )]. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F304 (BACOS) F304 BACOS, DT20, DT10 Starting 16-bit area where angle data is stored or angle data (3 words) Area where calculated result is stored Operands Index...
Page 942 High−level Instructions Description −1 (the arccosine) of the value specified in S, S+1, and S+2 is calculated, and the result (an angle) is stored in D. COS−1 ([S][S+1]. [S+2]) → [D] S: Sign S+1: Integer value S+2: Decimal Set 0 for the sign in S when the data to be processed is positive, and set 1 for the sign when the data is negative.
Page 943 High−level Instructions F305 (BATAN) BCD type Arctangent operation P305 (PBATAN) −1 Outline Triangle functions, This instruction calculates arctangent [TAN ( )]. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger F305 (BATAN) F305 BATAN, DT20, DT10 Starting 16-bit area where angle data is stored or angle data (3 words) Area where calculated result is stored Operands Index...
Page 944 High−level Instructions Description −1 (the arctangent) of the value specified in S, S+1, and S+2 is calculated, and the result (an angle) is stored in D. −1 ([S][S+1]. [S+2]) → [D] S: Sign S+1: Integer value S+2: Decimal Set 0 for the sign in S when the data to be processed is positive, and set 1 for the sign when the data is negative.
Page 945 High−level Instructions F309 (FMV) Floating point data move P309 (PFMV) Outline Copies floating point data (32 bits) to the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P309 (PFMV)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 946 High−level Instructions Description The floating point data (32 bits) specified by S is copied to the 32-bit area specified by D when the trigger turns Floating point data Real number data Lower word D+1: Higher word Range of real number data which can be set are as follows: Positive: f0.0000001 to f9999999 Negative: f−9999999 to f−0.000001 Precaution during programming...
Page 947 High−level Instructions F310 (F+) Floating point data addition P310 (PF+) Outline Adds two real number data items and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P310 (PF+)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 948 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F310 F+, DT 0, DT 2, % DT 4 When the constant K is specified in S1 and S2, the operations are the same as when a integer device is specified.
Page 949 High−level Instructions F311 (F−) Floating point data subtraction P311 (PF−) Outline Subtracts real nuumber data from the minuend and stores the result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P311 (PF−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 950 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F311 F−, DT 0, DT 2, % DT 4 When the constant K is specified in S1 and S2, the operations are the same as when a integer device is specified.
Page 951 High−level Instructions F312 (F*) Floating point data multiplication P312 (PF*) Outline Multiplies two real number data items and stores the result in the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instructions are not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 952 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F312 F*, DT 0, DT 2, % DT 4 When the constant K is specified in S1 and S2, the operations are the same as when a integer device is specified.
Page 953 High−level Instructions F313 (F%) Floating point data division P313 (PF%) Outline Divides real number data by the divisor and stores the divided result in the specified 32-bit area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P313 (PF%)” is not available. Program example Boolean Ladder Diagram...
Page 954 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F313 F%, DT 0, DT 2, % DT 4 When the constant K is specified in S1 and S2, the operations are the same as when a integer device is specified.
Page 955 High−level Instructions F314 (SIN) Floating point data Sine operation P314 (PSIN) Outline Triangle functions, This instruction calculates sine [SIN ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P314 (PSIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 956 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F314 SIN, DT 0, % DT 4 When the constant K is specified in S, the operations are the same as when a integer device is specified. Program example The “f0.4999999”...
Page 957 High−level Instructions F315 (COS) Floating point data Cosine operation P315 (PCOS) Outline Triangle functions, This instruction calculates cosine [COS ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P315 (PCOS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 958 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F315 COS, DT 0, % DT 4 When the constant K is specified in S, the operations are the same as when a integer device is specified. Program example The “f0.7071068”...
Page 959 High−level Instructions F316 (TAN) Floating point data Tangent operation P316 (PTAN) Outline Triangle functions, This instruction calculates tangent [TAN ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P316 (PTAN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 960 High−level Instructions Program example The “f1.732048” is stored to DT20 and DT22 when the R0 turns on. Radians of 60 ° F316 TAN, f1.047197, DT20 Precautions during programming The accuracy of the calculation decreases as the absolute value of the angle data specified in S+1 and S increases.
Page 961 High−level Instructions F317 (ASIN) Floating point data Arcsine operation P317 (PASIN) −1 Outline Triangle functions, This instruction calculates arcsine [SIN ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P317 (PASIN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 962 High−level Instructions Program example The “f0.5235986 (radians of 30 degrees)” is stored to DT20 and DT21 when the R0 turns on. F317 ASIN, f0.4999999, DT20 Precautions during programming D+1 and D is stored within the following range: −π/2 (radians) [D+1, D] π/2 (radians) For FP0, this instruction F317 (ASIN) cannot be programmed in the interrupt program.
Page 963 High−level Instructions F318 (ACOS) Floating point data Arccosine operation P318 (PACOS) −1 Outline Triangle functions, This instruction calculates arccosine [COS ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P318 (PACOS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 964 High−level Instructions Program example The “f0.7853980 (radians of 45 degrees)” is stored to DT20 and DT21 when the R0 turns on. F318 ACOS, f0.7071069, DT20 Precautions during programming D+1 and D is stored within the following range: 0.0 (radians) [D+1, D] π...
Page 965 High−level Instructions F319 (ATAN) Floating point data Arctangent operation P319 (PATAN) −1 Outline Triangle functions, This instruction calculates arctangent [TAN ( )]. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P319 (PATAN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 966 High−level Instructions Program example The “f1.047197 (radians of 60 degres)” is stored to DT20 and DT21 when the R0 turns on. F319 ATAN, f1.73205, DT20 Precautions during programming D+1 and D is stored within the following range: − π/2 (radians) < [D+1, D] < π/2 (radians) For FP0, this instruction F319 (ATAN) cannot be programmed in the interrupt program.
Page 967 High−level Instructions F320 (LN) Floating point data natural logarithm P320 (PLN) Outline This instruction calculates a natural logarithm LN( ). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P320 (PLN)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 968 High−level Instructions Program example The “f1.6094379” is stored to DT20 and DT21 when the R0 turns on. F320 LN, K 5, DT20 The “f−0.3160815” is stored to DT30 and DT31 when the R0 turns on. F320 LN, f0.729, DT30 Precaution during programming For FP0, this instruction F320 (LN) cannot be programmed in the interrupt program.
Page 969 High−level Instructions F321 (EXP) Floating point data exponent P321 (PEXP) Outline This instruction calculates the exponent of a floating point real number EXP( ). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P321 (PEXP)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 970 High−level Instructions Program example The “f7.389056” is stored to DT20 and DT21 when the R0 turns on. F321 EXP, K 2, DT20 The “f221.406402” is stored to DT30 and DT31 when the R0 turns on. F321 EXP, f5.4, DT30 Precaution during programming For FP0, this instruction F321 (EXP) cannot be programmed in the interrupt program.
Page 971 High−level Instructions F322 (LOG) Floating point data logarithm P322 (PLOG) Outline This instruction calculates the logarithm of a floating point real number LOG( ). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P322 (PLOG)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address...
Page 972 High−level Instructions Program example The “f1.30103” is stored to DT20 and DT21 when the R0 turns on. F322 LOG, K20, DT20 The “f0.0108932” is stored to DT30 and DT31 when the R0 turns on. F322 LOG, f1.0254, DT30 Precaution during programming For FP0, this instruction F322 (LOG) cannot be programmed in the interrupt program.
Page 973 High−level Instructions F323 (PWR) Floating point data power P323 (PPWR) Outline This instruction raises a floating point real number to the specified power. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P323 (PPWR)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction...
Page 974 High−level Instructions Specifying the integer device with [D], the real numbers are automatically converted into integer data. F323 PWR, DT 0, DT 2, % DT4 When the constant K is specified in S1 and S2, the operations are the same as when a integer device is specified.
Page 975 High−level Instructions F324 (FSQR) Floating point data square root P324 (PFSQR) Outline Takes the square root of the specified real number data and stores result in the specified area. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P324 (PFSQR)” is not available. Program example Boolean Ladder Diagram...
Page 976 High−level Instructions Program example The “f1.41421” is stored to DT20 and DT21 when the R0 turns on. F324 FSQR, K 2, DT20 Precaution during programming For FP0, this instruction F324 (FSQR) cannot be programmed in the interrupt program. Flag conditions ・Error flag (R9007): Turns on and stays on when: ・Error flag (R9008):...
Page 977 High−level Instructions F325 (FLT) 16-bit integer data → Floating point real number data P325 (PFLT) Outline Converts 16-bit integer data to floating point real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P325 (PFLT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 978 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier exceeds the limit. ・Error flag (R9008): Turns on for an instant when the area specified using the index modifier exceeds the limit. ・=lag (R900B): Turns on for an instant when the converted data is recognized as “0”.
Page 979 High−level Instructions F326 (DFLT) 32-bit integer data → Floating point real number data P326 (PDFLT) Outline Converts 32-bit integer data to floating point real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P326 (PDFLT)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 980 High−level Instructions Flag conditions ・Error flag (R9007): Turns on and stays on when the area specified using the index modifier exceeds the limit. ・Error flag (R9008): Turns on for an instant when the area specified using the index modifier exceeds the limit. = flag (R900B): Turns on for an instant when the converted data is recognized as “0”.
Page 981 High−level Instructions F327 (INT) Floating point real number data → 16-bit integer data (largest integer not exceeding the floating point real P327 (PINT) number data) Outline Converts real number data to 16-bit integer data (the largest integer not exceeding the floating point real number data). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P327 (PINT)”...
Page 982 High−level Instructions Description Converts real number data range: (+32767.99 to −32767.99) specified by S to signed 16-bit integer data (the largest integer not exceeding the floating point data) when the trigger turns on. The converted data is stored in D. Real number Lower word data...
Page 983 High−level Instructions F328 (DINT) Floating point real number data → 32-bit integer data (largest integer not exceeding the floating point real P328 (PDINT) number data) Outline Converts real number data to 32-bit integer data (the largest integer not exceeding the floating point real number data). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P328 (PDINT)”...
Page 984 High−level Instructions Description Converts real number data (range: +2147483000 to −2147483000) specified by S+1 and S to signed 32-bit integer data (the largest integer not exceeding the floating point data) when the trigger turns on. The converted data is stored in D+1 and D. Real number Lower word data...
Page 985 High−level Instructions F329 (FIX) Floating point real number data → 16-bit integer data (rounding the first decimal point down to integer) P329 (PFIX) Outline Converts real number data to 16-bit integer data (rounding the first decimal point down to integer). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P329 (PFIX)”...
Page 986 High−level Instructions Description Converts real number data (range: 32767.99 to −32768.99) specified by S to signed 16-bit integer data (rounding the first decimal point down to integer) when the trigger turns on. The converted data is stored in D. Real number Lower word data Higher word...
Page 987 High−level Instructions F330 (DFIX) Floating point real number data → 32-bit integer data (rounding the first decimal point down to integer) P330 (PDFIX) Outline Converts real number data to 32-bit integer data (rounding the first decimal point down to integer). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P330 (PDFIX)”...
Page 988 High−level Instructions Description Converts real number data (range: −2,147,483,000 to 2,147,483,000) specified by S+1 and S to signed 32-bit integer data (rounding the first decimal point down to integer) when the trigger turns on. The converted data is stored in D+1 and D. Real number Lower word data...
Page 989 High−level Instructions F331 (ROFF) Floating point real number data → 16-bit integer data (rounding the first decimal point off to integer) P331 (PROFF) Outline Converts real number data to 16-bit integer data (rounding the first decimal point off to integer). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P331 (PROFF)”...
Page 990 High−level Instructions Description Converts real number data (range: +32767.49 to −32768.49) specified by S to signed 16-bit integer data (rounding the first decimal point off to integer) when the trigger turns on. The converted data is stored in D. Real number Lower word data Higher word...
Page 991 High−level Instructions F332 (DROFF) Floating point real number data → 32-bit integer data (rounding the first decimal point off to integer) P332 (PDROFF) Outline Converts real number data to 32-bit integer data (rounding the first decimal point off to integer). For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P332 (PDROFF)”...
Page 992 High−level Instructions Description Converts real number data (range: −2,147,483,000 to 2,147,483,000) specified by S+1 and S to signed 32-bit integer data (rounding the first decimal point off to integer) when the trigger turns on. The converted data is stored in D+1 and D. Real number Lower word data...
Page 993 High−level Instructions F333 (FINT) Floating point real number data rounding the first P333 decimal point down (PFINT) Outline This instruction rounds down the decimal part of real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P333 (PFINT)” is not available. Program example Boolean Ladder Diagram...
Page 994 High−level Instructions Description The decimal part of the real number data specified in S+1 and S is rounded down, and the result is stored in D+1 and D. Real number Lower word data Higher word S+1: Real number Lower word data Higher word D+1:...
Page 995 High−level Instructions F334 (FRINT) Floating point real number data rounding the first P334 decimal point off (PFRINT) Outline This instruction rounds off the decimal part of real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P334 (PFRINT)” is not available. Program example Boolean Ladder Diagram...
Page 996 High−level Instructions Description The decimal part of the real number data stored in S+1 and S is rounded off, and the result is stored in D+1 and D. Real number Lower word data Higher word S+1: Real number Lower word data Higher word D+1:...
Page 997 High−level Instructions F335 (F+/−) Floating point real number data sign changes (negative/positive conversion) P335 (PF+/−) Outline This instruction changes the sign of real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P335 (PF+/−)” is not available. Program example Boolean Ladder Diagram Ladder Diagram...
Page 998 High−level Instructions Description The real number data stored in S+1 and S is changed sign bit, and the result is stored in D+1 and D. Real number Lower word data Higher word S+1: Real number Lower word data Higher word D+1: Precaution during programming For FP0, this instruction F335 (F+/−) cannot be programmed in the interrupt program.
Page 999 High−level Instructions F336 (FABS) Floating point real number data absolute P336 (PFABS) Outline Takes absolute value of real number data. For the FP0R/FPΣ/FP−X/FP0/FP−e, the P type high−level instruction “P336 (PFABS)” is not available. Program example Boolean Ladder Diagram Ladder Diagram Address Instruction Trigger...
Page 1000 High−level Instructions Description Takes the absolute value of real number data specified by S when the trigger turns on. The result (absolute value) is stored in D+1 and D. Real number Lower word data Higher word S+1: Real number Lower word data Higher word D+1:...

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Panasonic FP-E Programming Manual

Chapter 1 Relays, Memory Areas and Constants

Chapter 2 Basic Instructions

Chapter 3 High−Level Instructions

Chapter 5 Appendix

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