I/O Allocation - Panasonic FP-M Hardware Manual

4. I/O Allocation

• The data of the high-speed counter board are stored in the special data registers.
Channel Data type
number
Channel 0 Target value 0
Target value 1
Elapsed value
Capture value
Channel 1 Target value 0
Target value 1
Elapsed value
Capture value
Channels Control area
0 and 1
Status monitor
register area
Special data
register
DT9104, DT9105 • These registers are for storing data of the high-speed
counter board.
DT9106, DT9107
DT9108, DT9109 • The target value areas, elapsed value, and capture
DT9110, DT9111 value are processed in binary in the range of
K-8,388,608 to K8,388,607. If the data outside the
range is input, the data is handled while disregarding
bit positions 24 to 31 in each register (bit positions 8
to 15 in higher 16-bit area of 32-bit data).
DT9112, DT9113 Note:
• Be sure to use the F1 (DMV) instruction to transfer
DT9114, DT9115
DT9116, DT9117 data in these special data registers to other registers,
DT9118, DT9119 or data in other registers to these special data
registers.
DT9120 • The control modes for the high-speed counter board
are specified by DT9120. The control modes, output
mode, internal and external reset enable/disable,
"target = elapsed" output control, and target setting
can be set. For details about construction of DT9120,
refer to the following page.
DT9121 • The status of the high-speed counter board can be
monitored by DT9121. The status of reset enable
input, output disable input, flag condition when target
value = elapsed value, and error code can be
monitored. For details about construction of DT9121,
refer to the following page.
7-5. High-speed Counter Board
Description
153