Panasonic FP-M Hardware Manual page 216

8-7. Special Data Registers
Address Name
DT9120 High-speed counter
board control area
208
Construction of DT9120
This area specifies the control modes for the high-speed counter board.
15 12 11
Bit position • • • •
Data 0 0
CH1 External reset control bit (1: disabled) *2
CH1 "Target = Elapsed" output control bit (1: disabled)
CH1 Target setting bit (1: set) *3
*1. Output mode:
The output goes ON or OFF when
the elapsed value becomes equal
to the target. These bits specify the
mode for output transition when
the elapsed value becomes equal
to the target value. If the output
mode is changed, set the target
value again.
*2. External reset control bit:
These bits (bit positions 3 and
11) are in the ON state, the
external reset inputs
(RST.0/RST.1) are ignored as:
By turning ON the external reset enable inputs (RST.E0/RST.E1), you can
enable the external reset inputs (RST.0/RST.1). The external reset inputs
(RST.0/RST.1) effective are:
- external reset inputs while the external reset enable input is in the ON states.
- the first external reset inputs after the external reset enable input turns OFF.
*3. Target setting:
To preset the target values for the high-speed counter board, first, transfer the set
values to the special data registers for the target values. Then, turn the target
setting bit from 0 to 1. A set value is revised at the moment the leading edge of this
bit is detected. Therefore, if the bit is already set to 1, change the bit from 1 to 0
and then change it back to 1.
*4. Number system selection:
This bit is prepared to select the number system used for the high-speed counter
board. If you set this bit to 0, the data counts the number in the BCD code.
However, the FP-M usually handles numbers in binary, so use of the binary
number system is recommended.
Description
8 7 4 3 0
• • • •
1 0
CH0 Output mode for target *1
CH0 Internal reset control bit (1: reset)
CH0 External reset control bit (1: disabled) *2
CH0 "Target = Elapsed" output control bit (1: disabled)
CH0 Target setting bit (1: set) *3
Number system selection *4
Set this bit to 1 (BIN number system)
CH1 Output mode for target *1
CH1 Internal reset control bit (1: reset)
Bit
Channel
position
0
0
1
8
1
9
External reset control bit
(bit positions 3 and 11)
External reset input
(RST.0/RST.1)
External reset control bit
(bit positions 3 and 11)
External reset enable input
(RST.E0/RST.E1)
External reset input
(RST.0/RST.1)
Corresponding Corresponding
target value output
Target 0 OUT00
Target 1 OUT01
Target 0 OUT10
Target 1 OUT11
Bit data 0: OFF → ON
1: ON → OFF
ON
OFF
ON
OFF
Reset inputs ignored
ON
OFF
ON
OFF
ON
OFF
Reset inputs become effective