Interrupts - Gateway 910 Series System Manual

Interrupts

The following table suggests a logical interrupt mapping of interrupt sources.
It reflects a typical configuration, but you can change these interrupts. Use
the information to determine how to program each interrupt. The actual
interrupt map is defined using configuration registers in the I/O controller.
I/O Redirection Registers in the I/O APIC are provided for each interrupt
signal. The signals define hardware interrupt signal characteristics for APIC
messages sent to local APIC(s).
Interrupt
NMI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
* This setting is the default, but it can be changed in the BIOS Setup utility.
112
Reference Data
System Resource
I/O channel check
Reserved, interval timer
Reserved, keyboard controller
Reserved, cascade interrupt from slave PIC
COM2*
COM1*
USB
Floppy controller
LPT1*
Real-time clock
Reserved for ACPI SCI
User available
User available
Onboard mouse port (if present, otherwise user available)
Reserved, system interrupt/FERR
Primary IDE (if present, otherwise user available)
Secondary IDE (if present, otherwise user available)