Lcd Controller Module; Lcdc System Overview; Mpu Interface; Direct Memory Access (Dma) - Motorola DragonBall MC68328 User Manual

SECTION 4

LCD CONTROLLER MODULE

The liquid crystal display controller (LCDC) provides display data for an external LCD driver
or LCD panel module. The key features include the following:
• Share system and display memory, no dedicated video memory required
• Standard panel interface for common LCD drivers
• Supports single (non-split) screen monochrome LCD panels
• Fast flyby type, 16-bit wide, burst-DMA screen refresh transfers from system memory
• Maximum display size is 1024x512; however, the typical non-split panel sizes are
320x240 and 640x200
• Panel interface: 1-, 2-, or 4-bit wide LCD data bus
• Black and white, or 4 simultaneous gray levels out of a palette of 7
• Hardware blinking cursor; programmable up to 32 x 32 pixels in size
• Hardware panning (soft horizontal scrolling)
The LCDC fetches display data directly from system memory through periodic DMA transfer
cycles. The bus bandwidth used by the LCDC is low, thereby enabling the MC68EC000 core
to have sufficient computing bandwidth for other tasks.

4.1 LCDC SYSTEM OVERVIEW

The LCDC is built of six basic blocks, namely MPU interface registers, screen DMA control-
ler, line buffer, cursor logic, frame-rate control and LCD panel interface as shown in Figure
4-1.

4.1.1 MPU Interface

The MPU interface consists of all control registers that enable all different features of the
LCDC. This block is connected directly to the 68K bus.

4.1.2 Direct Memory Access (DMA)

The DMA generates a bus-request signal to the MC68EC000 periodically and, upon receiv-
ing a bus grant, performs a 16- or 8-word memory burst to fill the line buffer. The number of
DMA clock cycles per transfer is programmable (1, 2, 3, or 4 clocks/transfer), which makes
it more versatile to support systems with memory of different speeds.
MOTOROLA MC68328 DRAGONBALL PROCESSOR USER'S MANUAL 4-1