HP 8924C Reference Manual page 86

Chapter 2, Description of Connectors
Connectors That Begin with a Number
10 MHz REF OUTPUT
16X CHIP OUTPUT
86
The 10 MHz reference output is one output of a reference phase-locked-loop that
generates 10 MHz reference signals for all of the digital and analog phase-locked-
loops in the Test Set. This reference phase-locked-loop has a fractional divider,
enabling it to lock to many frequencies, which are listed in the description of the
REF INPUT connector.
Operating Considerations
• BNC
• This reference signal will be phase-locked to the reference input if the operating
conditions specified in the REF INPUT connector description are met.
• Nominal output level is >+5 dBm
• Output impedance is 50Ω
• Frequency stability is the same as the signal applied to the REF INPUT connector.
See Also
External Reference field description, on page 259
"REF INPUT" on page 81
The 16X CHIP OUTPUT is a 19.6608 MHz clock output synchronized with the
1.2288 MHz chipping rate that spreads the CDMA signal. The 16X CHIP
OUTPUT is phase-locked to the Test Set's internal 10 MHz reference.
Operating Considerations
• BNC
• The EVEN SEC INPUT
• Nominal output level is >+5 dBm
• Output impedance is 50Ω
• All frame clocks are locked to the Test Set's internal 10 MHz reference frequency
stability is the same as the signal applied to the REF INPUT connector.
See Also
"1X CHIP OUTPUT" on page 85
"CELL SITE/TRIGGERS" on page 69
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