In Transfer; Bulk-Only Support - Epson S2R72V18 Technical Manual

1. Functions
1.3.5.2

IN Transfer

Data sent in IN transfers should be written to the FIFO linked to each endpoint. Data can be written
to the FIFO by CPU interface register writing or CPU interface DMA writing.
To write data to the FIFO using CPU interface register writing, select a single FIFO area using the
AREAx{x=0-5}Join_0.JoinCPU_Wr bit. The FIFO area selected can be written to using the
FIFO_Wr register, enabling data packets to be sent in the sequence written. The FIFO empty space
can be checked using the FIFO_WrRemain_H,L registers. FIFO areas cannot be written to when
full. Always confirm the empty space using the FIFO_WrRemain_H,L registers to ensure writes do
not exceed the space available.
To write data to the FIFO using CPU interface DMA writes, select a single FIFO area for each
DMA channel using the AREAx{x=0-5}Join.JoinDMA bit and set the DMA_Control.Dir bit to "0."
The FIFO area selected can be written to by the CPU interface using the DMA sequence, enabling
data packets to be sent in the sequence written. The CPU interface will automatically pause the
DMA for flow control once the FIFO fills up.
If the data in the FIFO exceeds the max packet size, a response is automatically returned to the IN
transaction, allowing data to be sent. For this reason, IN transfers can be performed by the firmware
without controlling individual transactions. However, the EnShortPkt bit must be set if a short
packet must be sent at the end of the data transfers. This bit is cleared once the IN transaction is
completed for the short packet sent. It can be set once data writing to the FIFO is complete. The
endpoint EnShortPkt bit is automatically set in the event of fractional data of less than the max
packet size in the FIFO when CPU interface DMA writing ends with the
DMA_FIFO_Control.AutoEnShort bit set.
1.3.6

Bulk-Only Support

This LSI includes a bulk-only support function, which assists with Command Block Wrapper (CBW)
receipt and Command Status Wrapper (CSW) transmission specific to USB Mass Storage Class
(BulkOnly Transport Protocol) for endpoint EPa, EPb, EPc, EPd, and EPe bulk transfers.
Setting the D_BulkOnlyConfig.EPx{x=a-e}BulkOnly bit enables the bulk-only support function for the
corresponding endpoint.
While the bulk-only support function is enabled and CBW or CSW support is activated, packets are
received (CBW) or sent (CSW) using the area assigned as the CBW or CSW area rather than the FIFO
area normally assigned to the endpoint.
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EPSON
S2R72V18 Technical Manual (Rev.1.00)